Monolithic Photonic Integrated Circuit Based on Silicon Nitride and Lithium Niobate on Insulator Hybrid Platform

Lithium niobate on insulator (LNOI) has been demonstrated as a promising platform for photonic integrated circuits (PICs), thanks to its excellent properties such as strong electro‐optic effect, low material loss, and wide transparency window. Herein, a monolithic PIC for high‐speed data communication application on a lithium‐niobate‐etchless platform with silicon nitride (Si3N4) as a loading material is proposed and demonstrated. The fabricated PIC consists of four racetrack resonator modulators and a pair of four‐channel mode (de)multiplexers, which shows high data modulation rate of 70 Gbps for single channel and the total data throughput reaches up to 280 Gbps. To the best of knowledge, this is the first demonstration of PIC consisting of high‐speed electro‐optical modulators and (de)multiplexers with such high data capacity on Si3N4‐LNOI hybrid platform, which opens up new avenues for achieving large‐scale monolithic integration on LNOI platform in future.


Introduction
Photonic integrated circuits (PICs) play a key role in optical interconnections, optical computing, and optical neural networks due to their high speed and large capacity. [1,2] Lithium niobate on insulator (LNOI) has been demonstrated as one of the most promising platforms for PICs due to its inherent advantages, such as strong Pockels effect (r 33 ¼ 33 pm V À1 ), large optical nonlinear coefficients (d 33 ¼ 27 pm V À1 ), and wide transparency window (0.35 $ 5 μm). [3][4][5] However, lithium niobate has stable chemical properties, and common chemical etching methods are ineffective in forming low-loss waveguides. [5] In recent years, the physical dry etching with Ar þ milling has been verified as an effective method for directly etching lithium niobate to realize integrated photonic devices on the LNOI platform. [6] Various high-performance integrated photonic devices such as modulators, [7][8][9] optical frequency combs, [10,11] and wavelength converters [12,13] have been demonstrated experimentally. Except for direct etching on the LNOI platform, the hybrid platform with a readily etched loading material on the top of the LNOI chip is another good choice for realizing large-scale PICs, where one can fabricate hybrid waveguides on the LNOI platform conveniently without etching the lithium niobate thin film. [6,14] Compared with other loading materials such as silicon, [15,16] tantalum pentoxide, [17] polymer, [18] silicon nitride (Si 3 N 4 ) is one of the most promising loading materials for the hybrid LNOI platform. [19][20][21][22][23][24] First, the fabrication processes for silicon nitride material are commercially available, which means it is convenient to realize large-scale PICs with good scalability on the Si 3 N 4 -LNOI hybrid platform. Secondly, Si 3 N 4 has a slightly lower refractive index than lithium niobate, [25] and thus the optical mode in hybrid waveguides can be mostly confined in the lithium niobate layer to take full advantage of its excellent material properties. At last, Si 3 N 4 has low material loss and an optical transparency window similar to that of lithium niobate, [25] which also means the performance of PICs based on such a hybrid platform will not suffer significant degradation caused by the introduction of loading material. Currently, various active and passive devices have been proposed and demonstrated on the Si 3 N 4 -LNOI hybrid platform. [19][20][21][22][23][24][25][26][27][28][29][30] DOI: 10.1002/adpr.202200121 Lithium niobate on insulator (LNOI) has been demonstrated as a promising platform for photonic integrated circuits (PICs), thanks to its excellent properties such as strong electro-optic effect, low material loss, and wide transparency window. Herein, a monolithic PIC for high-speed data communication application on a lithium-niobate-etchless platform with silicon nitride (Si 3 N 4 ) as a loading material is proposed and demonstrated. The fabricated PIC consists of four racetrack resonator modulators and a pair of four-channel mode (de)multiplexers, which shows high data modulation rate of 70 Gbps for single channel and the total data throughput reaches up to 280 Gbps. To the best of knowledge, this is the first demonstration of PIC consisting of high-speed electro-optical modulators and (de)multiplexers with such high data capacity on Si 3 N 4 -LNOI hybrid platform, which opens up new avenues for achieving large-scale monolithic integration on LNOI platform in future.
As a proof of concept, a monolithic PIC is proposed and demonstrated for on-chip data communication application based on the Si 3 N 4 -LNOI hybrid platform, which consists of four racetrack-resonator modulators (RRMs) and a pair of fourchannel mode (de)multiplexers (MMUXs). The fabricated PIC shows excellent performance with a single-channel data communication rate of 70 Gbps, and the total data capacity can reach up to 280 Gbps. To the best of our knowledge, this is the first demonstration of a monolithic PIC on the Si 3 N 4 -LNOI hybrid platform with such high data capacity. The proposed PIC has excellent potential for the applications of high-speed and large-capacity on-chip optical interconnection in the future.

Principle and Design
2.1. General Architecture Figure 1a shows the 3D schematic diagram of the proposed PIC consisting of four RRMs and a pair of MMUXs on an X-cut Si 3 N 4 -LNOI hybrid platform. The principle of the PIC is described as follows. The four light beams at the resonances of four racetrack-resonators are coupled from single-mode fibers to the chip by means of grating couplers, and then modulated by the corresponding RRMs respectively. The modulated optical signals are transferred to different mode channels in the multimode bus waveguide by the MMUX. After transmitting a distance, the signals carried on different modes are demultiplexed to different output ports and coupled out of the chip via grating couplers and single-mode fibers for characterizing the performances of the proposed PIC.
Here, the Si 3 N 4 -LNOI hybrid platform is formed by the silicon substrate, the buried oxide layer, the lithium niobate thin film, and the Si 3 N 4 loading layer. The thicknesses of the buried oxide layer, the lithium niobate thin film, and the Si 3 N 4 loading layer are chosen as 4.7 μm, 300, and 300 nm respectively, following our previous work. [29] The proposed PIC is designed along the crystallographic Z direction, for full use of the strongest electro-optic coefficient of lithium niobate. By using the finite element method (FEM), [31] the simulated mode profile in the hybrid waveguide with a Si 3 N 4 width of 1 μm is shown in Figure 1b. The anisotropy of lithium niobate has been considered carefully in our simulation, with an extraordinary refractive index (n e ) of $2.14 for the crystallographic Z direction and an ordinary refractive index (n o ) of $2.21 for the crystallographic X/Y directions, at the wavelength of 1550 nm. As aforementioned, the Si 3 N 4 has a slightly lower refractive index ($1.99) when compared with lithium niobate. Hence, it can be seen that the optical mode is mostly confined in the lithium niobate thin film, which is vital for electro-optical modulation.

Design and Static Performance of RRM
RRM is one of the key building blocks of the proposed PIC, which determines the data communication rate of each channel. Figure 2a shows the 3D schematic diagram with a cross-sectional view of the proposed RRM. The widths of the racetrack resonator waveguides are chosen to be w ¼ 1 μm, which have been demonstrated to be under the single-mode condition for quasi-transverse electric (TE) modes. [22] The coupling gap between the straight waveguide and racetrack waveguide is designed as g ¼ 750 nm to satisfy the critical coupling condition for obtaining a relatively high extinction ratio. [32] It can be seen that the racetrack waveguide consists of two long straight tracks connected by bending waveguides. The straight track length is designed as L ¼ 1.5 mm, and the radius of the bending waveguides is chosen to be r 1 ¼ 300 μm. To realize high-efficiency electro-optical modulation, travelling-wave electrodes in the form of ground-signal-ground (G-S-G) are designed along one of the two straight long tracks. The electrode metal is selected to be gold with a thickness of d ¼ 500 nm. Figure 2b shows the simulated impedance of the electrodes as a 2D function of the width of the signal electrode (w s ) and the gap between signal and ground electrodes (g 1 ), by using a FEM eigenmode solver. [33] The impedance of the electrodes is designed to be 50 Ω for the impedance matching, as indicated by the solid black line in Figure 2b. In contrast, the optical loss induced by the electrodes and the index matching between the RF signal and optical signal should also be considered carefully. Thus, the width of the signal electrode is designed to be w s ¼ 23 μm, and the gap between signal and ground electrodes is designed to be g 1 ¼ 5.8 μm. According to our calculation,  Figure 2c shows the microscope image of the fabricated single RRM with the measured transmission spectrum shown in Figure 2d. In the experiment, the light is transmitted by an amplified spontaneous emission source, which is coupled in and out of the chip by using a pair of standard single-mode fibers. The output light is directed to an optical spectrum analyzer for transmission spectra plotting. The coupling angle of the fibers is %10°, and the transmission spectrum of the device is normalized by that of a straight waveguide fabricated closely on the same chip. The measured optical insertion loss and extinction ratio are about 0.5 and 10.5 dB, respectively. To characterize the static EO performance of the RRM, a 100 kHz triangular voltage sweep is applied to the electrodes by using an RF probe, with the peak voltages of AE2 V due to the limitation of our equipment. At the other end, the electrodes are terminated by a 50 Ω load applied to another RF probe for impedance matching. The input wavelength is fixed at around 1550 nm. The measured optical response of the fabricated RRM is shown in Figure 2e. Up to $80% difference is observed for the optical power when the induced phase shift changes from the most positive to the most www.advancedsciencenews.com www.adpr-journal.com negative. We can obtain a higher excitation ratio of the fabricated RRM by increasing the applied voltage amplitude in the future.

Design and Static Performance of MMUX
MMUX is the other critical component of the proposed PIC, which should be designed carefully to reduce insertion loss and intermodal crosstalk. In this work, we chose asymmetric directional couplers (ADCs) to realize MMUXs, as shown in Figure 3a, and its detailed principle can be found in our previous work. [22] Here, the width of the single-mode waveguide is decreased to be w 0 ¼ 0.8 μm to further reduce the inter-modal crosstalk. To satisfy the phase-matching condition, [34] the widths of the multimode waveguides supporting TE 1 , TE 2, and TE 3 modes are designed to be w 1 ¼ 2.164 μm, w 2 ¼ 3.537 μm, and w 3 ¼ 4.903 μm, respectively. All of the coupling gaps in the ADCs are designed to be g 2 ¼ 0.3 μm, considering our fabrication limitation. The radius of the bending waveguides is designed to be r 2 ¼ 150 μm to reduce transmission loss. After that, the coupling lengths are optimized by using the finite-difference time-domain (FDTD) method to achieve the highest mode coupling efficiency, [35] which are designed to be L 1 ¼ 4 μm, L 2 ¼ 12 μm, and L 3 ¼ 18 μm for TE 1 , TE 2, and TE 3 modes, respectively. The simulated transmission spectra of TE 0 -to-TE 1 , TE 0 -to-TE 2 , and TE 0 -to-TE 3 mode conversions in the ADCs are shown in Figure 3b-d. The simulated mode conversion efficiencies are larger than À0.53, À0.61, and À0.62 dB, while inter-modal crosstalk is below À28.9, À22.1, and À17.9 dB for TE 1 , TE 2, and TE 3 modes, respectively, at a wavelength range of 1525-1565 nm.
Similarly, we fabricated the MMUXs with the designed parameters on the same chip, with the microscope image shown in Figure 4a. The input and output ports for TE 0 $ TE 3 modes are indicated as I 0 $ I 3 and O 0 $ O 3 , respectively. Figure 4b-d shows the measured transmission spectra of the fabricated device. The transmission spectra of the device are also normalized by that of a reference straight waveguide fabricated closely on the same chip. It can be seen that the experimental results match the simulations well. The measured insertion loss and inter-modal crosstalk for all mode channels is lower than 1.83 and À15.3 dB, respectively, at a wavelength range of 1525-1565 nm.

High-Speed Data Communication
The microscope image of fabricated PIC is shown in Figure 5a, with the close-up images of the coupling region of RRM, the    coupling region of ADC-based mode converter, and the grating coupler shown in Figure 5b-d, respectively. The experimental setup for the demonstration of on-chip high-speed data communication is shown in Figure 6a. The light input to the chip is first modulated by RRM with PRBS 2 10 -1 on-off key (OOK) electrical signals, then coupled to the corresponding mode channels, and finally demultiplexed from the bus waveguide to different output ports for dynamic measurements (see Experimental Section). The measured eye diagrams of different modulated data rates for TE 0 -TE 3 mode channels are shown in Figure 6b. The measured single-channel data modulation rate can reach up to 70 Gbps, which is temporarily limited by the output voltage attenuation of our arbitrary waveform generator (AWG) with the increase in data rate. We believe the data modulation rate can be further increased with the improvement of our equipment in the near future. For 56, 64 and 70 Gbps modulated data rates, the measured extinction ratio of the eye diagrams for four-mode channels are 3.62, 2.90, and 2.04 dB, respectively. In addition, we also measured the bit-error rates (BERs) of TE 0 -TE 3 mode channels with a data modulation rate of 56 Gbps, as shown in Figure 6c. It can be seen that the BERs decrease with the increased received power. To our knowledge, the measured BERs are lower than the limit of soft-decision forward error correction (SD-FEC) of 4 Â 10 À2 . [8] 4

. Discussion
In this work, we have successfully verified the high-speed data communication of fabricated PIC. The modulated data rate of the single RRM reaches up to 70 Gbps, and the total data throughput reaches 280 Gbps. The maximum modulation rate of our racetrack modulator and the ER of eye diagrams are curbed by equipment since the voltage applied to the chip has obvious attenuation. In Table 1, we compare the reported micro-ring resonator modulators, racetrack resonator modulators, and the same type of PICs on the LNOI platform. It can be seen that the modulator in the fabricated PIC has the highest  modulated data rate compared with the reported same type of modulators on the LNOI platform. Although, the single MZI modulator based on LNOI can support very high data rates. [7,8] However, with the continuous growth of data capacity, the performance of a single MZI modulator will be difficult to meet the application demands. Thus, combining modulators with MDM technology is a promising scheme to meet the challenges for future data capacity growth.

Conclusion
In summary, we propose, design, and demonstrate a PIC consisting of RRMs and MMUXs for on-chip data communication based on the Si 3 N 4 -LNOI hybrid platform. The static and dynamic measurements are carried out successfully. For highefficiency electro-optical modulation, the G-S-G traveling-wave electrodes are designed and fabricated for the RRMs, leading to an excellent static EO performance. The MMUX has been further optimized based on our previous work, [22] with low insertion losses below 1.83 dB and low inter-modal crosstalk below À15.3 dB over the whole C band. By combing the modulators with the MMUXs, the application for on-chip high-speed data communication with the 280 Gbps total data throughput has been verified. The communication capacity of our proposed PIC can be further improved greatly by combining other multiplexing technologies such as wavelength-division multiplexing and polarization-division multiplexing. [36,37] This work is expected to serve as guidelines for fabricating large-scale PICs for data communication applications based on the LNOI platform.

Experimental Section
Fabrication: The x-cut LNOI wafer with a thickness of 300 nm is provided by "NanoLN," and then a 300 nm-thick Si 3 N 4 thin film is deposited on the top of the LNOI wafer by using the reactive sputtering process, in accordance with our previous work. [38] After that, the waveguides are patterned and etched by using electron beam lithography (EBL) and inductively coupled plasma (ICP) processes, respectively. The grating couplers are formed during the same (single) process that is used for the fabrication of the waveguides, with a grating period of 910 nm and a filling factor of 0.4. The detailed principle and performance of the grating couplers can be found in our previous work. [26] Finally, the gold electrodes with a thickness of 500 nm are deposited and formed by using e-beam evaporation deposition, laser direct writing, and lift-off processes.
Dynamic Measurement: The light generated by a tunable laser source (EXFO FLS-2800) passes through the polarization controller (PC, Thorlabs-FPC561) for reducing the fiber-to-chip coupling loss. At the other end of the chip, the modulated optical signals are amplified by an erbium-doped fiber amplifier (EDFA, Keopsys CEFA). The undesired wavelengths are filtered out by the following optical tunable filter (OTF, Santec OTF-350). Finally, the optical signals are directed to the digitalcommunication analyzer (DCA, Keysight DCA-X-86100D) and error analyzer (EA, SHF 1104 A) for eye diagrams and BERs observation, respectively. For the electrical signal, the PRBS 2 10-1 OOK signal is generated by AWG (Keysight M8196A) and amplified by the RF amplifier (SHF S807C). An RF probe (GGB, 67 GHz) is used to apply the RF signal to the chip, and another probe (GGB, 67 GHz) with 50 Ω terminations is applied to the other end of the electrode for impedance matching. For 56, 64, and 70 Gbps modulated data rates, the calculated energy consumptions of the fabricated RRMs are 789, 391, and 212 fJ bit À1 respectively.