A novel placement method for mini-scale passive components in surface mount technology

This paper aims to propose a novel placing method, i.e., place-between-paste-and-pad (PB), for mini-scale passive components to enhance electronic assembly lines’ yield. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads’ center on the width direction. An experiment that involves 12 printed circuit boards (PCB) and 4500 resistors R0402M (0.40 mm × 0.20 mm) is designed and conducted to get comparative results of PB and two industrial placing methods, i.e., place-on-pad and place-on-paste. Based on this experiment’s results, PB outperforms the other two methods in terms of minimizing the components’ final misalignment. Furthermore, PB is a low-cost placing strategy because PB does not need the real-time communication between the solder paste inspection machine and the pick-and-place machine. The placement method proposed in this study is expected to offer a low-cost exploration in the pick-and-place procedure to enhance the surface mount assembly quality of mini-scale passive components.


Introduction
Surface mount technology (SMT) is an advanced method in electronic packaging. Compared with conventional electronics manufacturing (e.g., Thru-Hole manufacturing), SMT shows its possibilities in producing more reliable assemblies at a reduced weight, volume, and cost [13]. The molten solder is mainly used to connect surface mount In general, components would move to the most stable position during the reflow process, which is known as the self-alignment effect. The self-alignment effect happens due to the surface tension between molten solder and mating Cu pads [7]. The self-alignment effect would cause chip components to shift from the placed position during reflow. It leads to the possibility of employing the self-alignment effect to decrease the components' final misalignment. Though the self-alignment effect has been proved beneficial for large components in decreasing the misalignment [4][5][6], it did not perform so well for mini-scale components.
Two-component placing strategies have been employed in electronic assembly: place-on-pad (PP) and place-onpaste (PPS). PP is the traditional and prevalent method in the industry. Without considering the printed solder paste offsets, the components are always being placed onto the designed positions, i.e., on the PCB pads. The component's center coincides with the pads' center in an ideal situation.
As the SPP quality cannot be consistently guaranteed [12], this method cannot guarantee high quality for the components' final position due to the components that move away from the pads during reflow. An advanced method was then proposed to improve yields in a high-density placement using the self-alignment principle to solve the problem [5]. The method is named PPS in this study. During PPS, the SPI machine's solder locations data are collected and sent to the pick-and-place machine. Based on the solder paste position data, the components are placed onto the solder deposits rather than onto the pads Table 1.
With the miniaturization trend in electronic products, it is more frequently observed that mini-scale components' misalignment is still beyond acceptable tolerances after the reflow process. In addition, the smaller passive components have better self-alignment performances in the length direction than those in the width direction in our previous research applied on 81 PCBs and 182,250 assembled components. In the research, qualification rate (QR) is used to evaluate the severity of the components' misalignment. QR α = N α /N × 100%, where N α is the number of components whose post-reflow offsets are within α% of the components' dimensions, and N is the total number of placed components. According to our PCB pads' dimensions and the industry standard from IPC for class 3 products, such as life support, aerospace, and military systems, QR 25 is used to evaluate the percentage of acceptable components. QR 10 is used to assess the percentage of the optimized components with small misalignment because of further smaller offsets beyond the inspection accuracy of our AOI machines. The experiment results justify that PP cannot always guarantee a satisfactory outcome for miniature components. This observation motivates us to explore the possibility of finding a low-cost and superior placing strategy to PP.
To obtain further details of the experiment of our previous research, the performances of R0402M along the length and width directions are visualized in Fig. 1a-d. In Fig. 1, the horizontal axis represents the components' prereflow offsets. The vertical axis represents the printed solder pastes' offsets. The offset values are categorized with a bin width of 20 μm except category 0, which is defined as the offset within (−20 μm, 20 μm). For example, the PREL C category 2 means the component's pre-reflow misalignment is within (40 μm, 60 μm) for length direction. The color in Fig. 1 reflects the values of QR α . Both QR 25 and QR 10 should be higher to be better, which means the darkest color area stands for the highest QR α . The combinations that contain fewer than 10 data are removed to avoid the impacts of noise.
From the results shown in Fig. 1a-b for the length direction, when solder pastes belong to category 0, i.e., when the paste offsets were within (−20 μm, 20 μm), the performances of the components in different pre-reflow positions have similar outcomes. While for solder pastes that belong to other categories, i.e., when the paste offsets were beyond (−20 μm, 20 μm), the components usually have higher QR 25 and QR 10 when they were placed between the pads and the pastes. From Fig. 1c-d, it is evident that the components had the best performances when they were placed in category 0, i.e., the pre-reflow offsets were within (−20 μm, 20 μm), in the width direction wherever the solder pastes were.
Inspired by the observations, a novel low-cost placing method, place-between-paste-and-pad (PB), is proposed in this study to enhance the assembly quality for miniature passive components. Low cost means PB does not need real-time communication between SPI and pick-and-place Fig. 1 The performances of R0402M along the length and width directions. a QR 25 along the length direction. b QR 10 along the length direction. c QR 25 along the width direction. d QR 10 along the width direction machines. In PB, a component is supposed to be placed at the midpoint between solder paste and pads in the length direction when solder paste offsets are larger than ±20 μm, while the component's width center always aligns with the pads' center. PB is verified and compared to PP and PPS through an on-site experiment that utilized 4500 resistors R0402M (0.40 mm × 0.20 mm) and 12 PCBs. The results show that PB outperforms the other two methods with respect to minimizing components' misalignment. Regarding the percentage of acceptable components, i.e., QR 25 , PB and PP have equivalent performances, and their performances are superior to PPS.
The rest of this paper is organized as follows: Section 2 reviews previous related background information and studies; experiment design and settings are elaborated in Section 3; experiment results and analyses are included in Section 4; the conclusion is summarized in Section 5.

Related works
Self-alignment is a critical factor that affects the quality of SMT assembly. The correct employment of the selfalignment characteristics can decrease the components' final misalignment and improve SMT assembly process yield. Because the melting temperatures of different solder pastes generate variant tack strengths and cause distinct self-alignment performances, most related research focuses on specifying the effects of different types of solder paste on self-alignment [3][4][5][6][7][8] Lead-free solder paste showed a larger variation than tin-lead solder paste in self-alignment capabilities [8]. A comprehensive study figured that both the solder paste volume and soldering process could lead to different placement results. The solder paste volume has more significant effects on lead-free solder than on other solder types [3]. Also, simulation models are utilized to simulate the self-alignment movements during the reflow process. A 3D Surface Evolver model was used and proved that the twisting self-alignment can be improved by applying more solder paste [10].
However, limited research has focused on improving the PCB assembly quality in the P&P process control. In [5], an advanced method was proposed to improve the high-density placements with the help of the real-time communication between SPI and pick-and-place machines. Specifically, the SPI machine's solder location information would be utilized to update the placement program settings in a feed-forward manner. It was concluded that placing components on the pastes had better performances than placing them on the pad. Recently, non-linear programming models were employed in the P&P process to identify the optimal placement locations based on the predicted components movement information [11]. Nonetheless, the results had not been verified with experiments. In the study on self-alignment characteristics of smaller passive components, the results proved that smaller components had severe misalignment than larger ones under identical solder paste printing and component placement conditions; therefore, research then focuses on the smallest component type: R0402M.
As the continuing study of our previous research, PB is proposed in this study to explore the possibility of enhancing the SMT assembly quality in the P&P procedure. To compare the effects of different placement methods on miniature passive components, an experiment with chip resistors R0402M is conducted. The experimental details and outcome will be elaborated in the following sections.

Experimental design
To study the self-alignment behaviors of miniature passive components under various solder paste offset values, a stencil with 25 intentional solder paste offset settings is utilized. Four PCBs are assembled for each placement method as an experimental replication to enhance the experiment's generalizability. On each board, 375 resistors R0402M are placed horizontally. The tentative R0402M component dimensions are shown in Fig. 2. To strengthen the experiments' replicability, 15 components for each solder paste offset setting are repeated on every board.

Experimental environment
The experiment is conducted in an on-site production line in our lab. The line is started with an MPM Momentum printer and a Koh Young Aspire 3 solder paste inspection (SPI) machine, followed by a Universal Instruments Fuzion pick-and-place machine, a Koh Young Zenith pre-reflow automatic optical inspection (AOI) machine. Lastly, a Heller convection reflow oven and a Koh Young Zenith post-reflow

Stencil and PCB pad design
A nano-coating stainless steel stencil is employed to guarantee the solder paste offsets on each PCB are identical. The aperture shape format and size information are presented in Fig. 4. According to the definition of the corner ratio = r/(Length/2), it is set as 50%.
Single-sided FR-4 (woven glass and epoxy) PCBs are utilized in the experiment. The distance from the board edge to the pad area is 29 mm. The layout and dimensions of the pads are displayed in Fig. 5.

Solder paste printing and reflow process settings
In the solder printing process, the printing speed and separation speed are set as 33 mm/s and 80 mm/s, respectively, and the printing pressure is 8 kg.
The center of pads refers to the center point of the two pads used by one passive component. For the misalignment's calculation, the paste offsets are defined as the distance from the center point of the solder pastes to the corresponding pad center, as shown in Fig. 6a. The component's offsets refer to the component center's measurements to the pad center as illustrated in Fig. 6b.
Twenty-five solder paste offset settings are employed in the experiment. The offset values range from −80 to +80 μm with a 40-μm step size for the length direction. For the width direction, the offset values range from 0 to +80 μm with a 20-μm step size. The positive direction for length direction is defined as shown in Fig. 6c. The ±80 μm was chosen as the lower and upper bound of paste offset settings because the solder paste offset can be controlled within this range during the optimized solder printing process.
In the experiments, Indium8.9HF Pb-Free SAC305 solder paste is used. A 7-zone Heller 1700 W convection reflow oven with nitrogen as the reflow atmosphere is employed. The conveyor speed is set as 30 inches/min, i.e., 1.27 cm/s. The reflow recipe temperatures of the six heating zones are demonstrated in Table 2.

Pick-and-place placement methods
Three placement methods are utilized in the experiment: PP, PPS, PB. As illustrated in Fig. 7a, the PP method places the components on the center of the pads while PPS places the components on the solder paste's deposited location. The primary motivation of the PPS is to utilize the selfalignment proactively to reduce the final misalignment. It is noteworthy that each board's solder paste information is Fig. 3 The layout of the experimental production line [2] Fig. 4 The shape format and size information of the stencil's aperture   collected by an SPI machine and manually added to the computer-aided design (CAD) files before the pick-andplace process begins. The PPS is displayed in Fig. 7b. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads' center on the width direction. The details of PB are shown in Fig. 8. PB is designed as an offline version to satisfy the lowcost applications. After printing the first PCB, solder paste positional information will be collected by the SPI. Then, the intentional placement offsets will be added to the CAD file according to the rules of PB. For the following PCBs with the identical design, the same CAD file will be applied without considering the minor variances in the solder paste offsets from board to board. In the experiment, PB is not activated for the components whose pastes' offsets are within ±20 μm because PP always has a good performance in this area.
For example, when the solder paste offset values are (80,20) μm and the placing coordinates in the CAD file is (4,4) mm for length and width direction separately, the corresponding component will be placed (40,0) μm away from the pad center according to PB rules. Then, the intentional offsets will be added to the coordinates, and the final coordinates in the CAD file will be updated to (4.04,4) mm. However, if the solder paste offsets are (20,20) μm, PB will be not activated, and no intentional offsets will be added to the placing coordinates. For the solder paste offsets (80,20) μm and (80,40) μm, both have the intentional placing offsets as (40,0) μm. Because their paste offsets are the same in the length direction, the different paste offsets in the width direction make no difference in PB.

Results of printed solder pastes
Although there is no intentional change of the input solder paste, the solder paste volume's variation might exist. We measure each volume as the average of two solder pastes' volumes for one component. The results are shown in Fig. 9a-d and indicate the solder paste volumes of PPS are higher than PP and PB. The mean percentages of solder paste volumes for each method are 97.53%, 85.84%, and 87.84% for PPS, PP, and PB, respectively. However, given the fact that the 100% solder paste volume is 0.0035 mm 3 , Fig. 7 The graphical display of two placement methods. a Place-onpad. b Place-on-paste the average volume's differences among three placement methods are less than 0.0005 mm 3 . Therefore, the solder paste volumes of different placement methods could be regarded as being in similar situations.
The results of solder paste offsets along the length and width directions are compared and demonstrated in Fig. 10a-b. As compared in Fig. 10, the solder paste offsets in the three placement methods are printed in equivalent conditions along with the length and width directions.

Results of post-reflow offsets
First, the post-reflow misalignment along the length and width directions is compared and displayed in Fig. 11a-b. The statistics outcomes are listed in Table 3, where PostL and PostW represent the post-reflow offsets on the length and width direction, respectively; mean and std represent the average and standard deviation separately. Based on the results, PB outperforms the other two methods with the smallest offset mean on both the length and width directions. With a 95% confidence level, the p-values of the t-test in the PostL and PostW are 0.03 and 0.00, which confirm the superiority of PB to PP with regard to minimizing the components' post-reflow offset. PB's variances are larger than PP, which has the smallest postreflow offsets variances in both directions. In contrast, PPS has the worst performances among the three placing strategies because the offset's mean and variances of PPS are the highest in both the length and width directions.
Then, a α-qualification metric (R α ) is introduced to evaluate the component's post-reflow outcome through the identification of whether a component's final offsets are within α% of the component's dimensions. According to our PCB pads' dimensions and the industry standard for class 3 products from IPC, R 25 is chosen to identify the acceptable components, and R 10 is chosen to evaluate the optimized components. A qualified component represents the components that meet the criteria. That is, the qualified component is labeled as R α . An unqualified one represents the components' offsets beyond the range of this qualification metric. For example, a component whose offsets are within 25% of the component size in both length and width directions is labeled as R 25 . The post-reflow   The values in bold represent the optimal outcomes The results of PB. c The results of PPS results of different placement methods are compared in Fig. 12a

Analysis of experimental results
In our experiment, most components in the PPS are not precisely being placed on the pastes grounded in the fact that the SPI machine has an accuracy of ±15 μm and the pick-and-place machine has an accuracy of ±30 μm. Figure 13a-c demonstrates the results of the solder pastes' printing and components' placement from one PCB for each placement method. According to the experimental results of Panasonic company, PPS is a placement method with outstanding performances. However, PPS has inferior outcomes than the other two placement methods in this experiment. One possible reason for this result is the final misalignment in PPS is sensitive to the actual positions where the components are placed. In other words, PPS can have a relatively stable outcome with smaller variance when the components are placed precisely on or very close to the pastes, as the situation is shown in Fig. 14a. However, PPS has a poor performance when the components are placed far away from the pastes, as shown in Fig. 14b. The post-reflow offsets' standard deviation on the length and width directions are [17.33 μm, 9.65 μm] and [28.25 μm, 14.15 μm] for the 50 components in Fig. 14a and b, respectively.
Contrary to PPS, PB is more robust to the variant placement conditions. For PB's width direction, components are always designed to be placed in alignment with the pads' centers to guarantee the components have a small post-reflow misalignment. For the length direction, the components are designed to be placed at the midpoint of pastes and pads. Due to the mounter's accuracy, the components' actual positions could be either close to the pastes or close to the pads if they are not being placed at the midpoints, and the post-reflow offsets are relatively small in either situation, as displayed in Fig. 14c-d. The components in Fig. 14c are placed closer to the pad area, and the postreflow offsets' standard deviations of the length and width direction are 8.71 μm and 10.76 μm separately. The components in Fig. 14d are placed closer to the pastes, and the post-reflow offsets' standard deviation of the length and width direction is 8.72 μm and 9.74 μm separately. Both have small variances in the components' post-reflow misalignment. Figure 14e displays the results of 20 PP components when they have a similar solder paste offset condition as PB in Fig. 14c-d. In Fig. 14e, the components are drawn away from the pads' center after reflow soldering. The average post-reflow misalignment of Fig. 14c-e for the length and width direction is (11.79, 14.31, 33.41) μm and (−4.95, −6.27, −11.71) μm, respectively. The results show the components in PB can obtain smaller misalignment than those in PP.

Summary of experimental results
In summation, PB allows the components to be placed near the center of the pads (i.e., higher QR 10 rather than PP) while having similar production cost compared to the PP. However, PPS has the worst performance in terms of the quality metrics in this study (e.g., the largest mean of postreflow offsets and the lowest QR 10 ) along with the highest placement cost.
Regarding the production cost, PPS adjusts the placement parameters according to the pastes' positions with the assistance of the real-time communication between SPI and P&P machines. While PB can be applied with the solder pastes information from the first PCB and adjusts the placing coordinates accordingly. For the following PCBs with the identical design, PB keeps the equivalent placement settings and takes no consideration of the paste's offsets' small variances from board to board. From this perspective, PB is a low-cost offline strategy as PP is.

Conclusions
The self-alignment effects have been studied and utilized in the P&P procedure to decrease the assembly misalignment of electronic components. In this study, PB is proposed based on the previous experimental results in our research, and further being compared with PP, PPS through an onsite experiment applied 4500 resistors R0402M and 12 PCBs. Both PB and PPS are designed to decrease the components' misalignment with the assistance of selfalignment effects. PB improves the assembly robustness by considering self-alignment and pick-and-place machine's accuracy simultaneously. However, PPS cannot guarantee consistent performances, especially for the components placed away from the pastes.
The results of the experiment prove that PB is a robust and economical placement strategy. PB has the highest percentage of components whose post-reflow offsets are within 10% of the component size and the comparable performances with PP regarding the percentage of acceptable components and production costs. PPS has low-quality results and high costs compared to the other two placement methods because PPS has the largest mean and standard deviation in post-reflow misalignment. A costly real-time communication system between the SPI and pick-and-place machines is a necessity for PPS.
In the future, the online placing strategy will be investigated to further improve the quality of SMT assembly in a real-time manufacturing environment. With the transferring trend to Industry 4.0, real-time communication among different kinds of machines will be more universal and economical in production lines. Therefore, developing an online P&P strategy to enhance the SMT assembly yield is a persuasive topic for the SMT industry. and the Integrated Electronics Engineering Center (IEEC) Pooled Research Award.

Data availability
The authors declare that all data and material support their published claims and comply with field standard.

Declarations
Consent to participate The authors declare that they consent to participate in this paper.