Critical parameters of gate control in NC-FinFET on GaAs

Maintaining constant gate control is important for ensuring accurate MOSFET adjustment of drive strength by changing its size. In the negative capacitance field-effect transistor (NCFET), the nonuniform distribution of ferroelectric polarization and capacitance match are sensitive to the size and tend to increase the fluctuation of gate control. In the current work, a detailed simulation of an NC-FinFET was carried out to clarify the effect of structural factors on its gate control. These factors include the fin structure (length, width, and height), the doping concentration in the GaAs channel, and the ferroelectric film thickness. Simulation results indicate that the subthreshold swing (SS) of an NC-FinFET with a complex oxide 0.85BiTi0.1Fe0.8Mg0.1O3-0.15CaTiO3 (BTFM-CTO) film is less sensitive to the variation in structural factors than that with HfO2 or PZT film. Thus, the fluctuation in gate control can be significantly ameliorated with a suitable set of structural factors and ferroelectric parameters. The current work generates new insights into the fluctuation of gate control with varying structural factors and adjustment of NC-FinFET drive strength, which are essential for the application of the NC-FinFET in analog circuits. This manuscript was edited for English language/grammar. Some of the text was difficult to interpret.

Advancements in technology such as the Internet of Things (IoT) [1], mobile smart devices [2], and wearable devices [3] have led to higher demand for ultralow-power and highperformance electronic devices. However, deep submicron devices suffer from troublesome short-channel effects (SCE) [4], such as increased leakage current (I OFF ) and drain-induced barrier lowering (DIBL) [5], which limits the further development of transistors. One common reason for these problems is that as the channel shortens, the effect of the drain voltage (V d ) cannot be neglected, and the control of the gate voltage (V g ) over the channel is weakened. This phenomenon is usually described as subthreshold swing (SS) [6]. A fin field-effect transistor (FinFET) enhances gate control over the channel by controlling the channel threedimensionally [7][8][9]. Under the restriction of the Boltzmann distribution, the SS of conventional transistors has a limit of 60 mV/dec. The negative capacitance (NC) [10,11] effect existing in the ferroelectric film offers a unique solution to the thermionic limit, termed Boltzmann's tyranny, through the gate voltage amplification (GVA) [12,13] effect. As a result, NC-FinFETs [14][15][16] incorporating ferroelectric film have low SS and superior gate control, rendering them a competitive candidate to satisfy Moore's law. Gate control can be maintained, ensuring the accurate adjustment of the transistor drive strength by changing its size. Thus, clarifying the effects of structural factors on gate control of the NC-FinFET related to its transfer performance and reducing the fluctuation of gate control is of great significance for further development of NC-FinFETs in circuit design.
The vertical channel existing in the FinFET is termed the fin, which provides an excellent means of controlling the carrier transport in the channel. Thus, the FinFET has a significant advantage over the conventional planar metal-oxide-semiconductor field-effect transistor (MOSFET), especially in SCEs [17,18]. The drive strength of the FinFET structure is usually insufficient and can be adjusted by changing its size. Increasing the height or width of the fin channel (C H , C W ) can enhance the drive strength of the FinFET. However, for stability purposes, C H is an important parameter that should be small. Moreover, the electric field intensity in the channel will change when C W or C H varies, resulting in fluctuation of gate control and thus other parameters such as threshold voltage (V th ) [19,20]. Large C W or C H weakens the gate control over the fin and causes the FinFET to behave like a quasi-planar structure, leading to poor performance. As a result, accurate adjustment of the FinFET drive strength is difficult.
The GVA effect endows the NC-FinFET with steep SS and superior performance. However, it is also difficult to accurately adjust the drive strength of the NC-FinFET by changing the size. According to related theory, the key to improving NCFET performance is to improve the match between the negative and positive capacitance [21,22]. Many studies have focused on ferroelectric parameters such as coercive electric field intensity (E C ), remanent polarization (P r ), and the thickness of the ferroelectric film (T FE ) [23,24]. Previous research has established that ferroelectric films with large E C , small P r , and large T FE tend to endow NC-FinFET with excellent performance. Researchers have not detailed the structural factors of NC-FinFETs, such as C W , C H , channel length (C L ), and substrate doping concentration (N D ), which have an effect on capacitance matching and further enhance the fluctuation of gate control. Moreover, an NC-FinFET without an internal gate is more prone to drain bias, and the distribution of ferroelectric polarization (P) is nonuniform [25] due to the multi-domain structure of ferroelectric material [26]. The nonuniform distribution of P depends on structural factors and can increase the fluctuation in gate control. Thus, P and channel surface potential (V int ) distribution are investigated with varying structural factors that guide the analysis of simulation results. The V int with and without V g bias reflects the GVA and negative differential resistance (NDR) [27] effect, respectively.
Before the application of the NC-FinFET in an analog circuit, a method for accurately adjusting the drive strength of the NC-FinFET should be established, and the dependence of gate control on structural factors should be clarified. In the present work, detailed simulations and analyses are carried out on a dual-channel NC-FinFET to clarify the effect of structural factors on its transfer performance related to gate control. Firstly, we introduce the inducement of gate control fluctuation and the adverse effect. Secondly, we present the basic theory of the NC-FinFET and device simulation parameters used in the current work. Then, we describe the simulation results of transfer performance with varying structural factors. The transfer performance assessment comprises four parameters: SS, ON-current (I ON ), OFF-current (I OFF ), and I ON /I OFF . P and V int are also investigated, which provide a reference for the analysis of simulation results. Finally, we present comprehensive analyses and discussion. Simulation results indicate that the fluctuation of gate control can be significantly reduced if a suitable set of structural factors and ferroelectric parameters is obtained. Thus, the drive strength of the NC-FinFET can be adjusted by changing its size, and a multichannel structure is not necessary. Figure 1a presents a schematic description of the NC-FinFET. Figure 1b shows an equivalent circuit for the NC-FinFET [28]. V int is a dominant electrical characteristic of the FinFET. V int is defined by Eq. (1), which can be further simplified into Eq. (2) with amplification factor (A g ) and drain coupling factor (A d ) defined by Eqs. (3) and (4), respectively. C int is composed of C gdo , C s , and C gso . These equations indicate that V g and V d determine V int . Considering that the capacitance of ferroelectric film (C fe ) is negative, A g exceeds unity, which is termed the GVA effect. The GVA effect endows the NC-FinFET with reinforced I ON and sub-60 mV/dec SS. A d turns negative when |C fe | is larger than C int . According to Eq. (2), a negative A d leads to a decrease in V int . As a result, both I ON and I OFF can decrease with increasing V d , which is termed the NDR effect. The NDR effect can suppress SCE effects, such as DIBL and the channel length modulation effect (CLME) [29], permitting the scaling down of MOSFETs. In addition, the NDR effect favors certain applications such as high-frequency oscillators, reflection amplifiers, memory, and logic switches [30]. Large A g and small A d can enhance the gate control capability.

Theory and model of the NC-FinFET
(1) The SS is given by Eq. (5) and is further simplified into Eqs. (6) and (7) [31]. K refers to the Boltzmann constant, m refers to the gate control coefficient, and n refers to the transport coefficient. n is determined by the charge carrier transport behavior and is limited by the Boltzmann statistical distribution. For the NC-FinFET structure, as shown in Fig. 1b, the C ox is replaced by negative C fe . If |C fe | is greater than the C int , the SS may be less than 60 mV/dec. To achieve steep SS, the C int of MOSFET should be as small as possible, while it is converse regarding NCFET for negative C fe .
Based on the conventional FinFET structure, the NC-FinFET can be fabricated by replacing the gate oxide with ferroelectric film. Its schematic is shown in Fig. 1a. Landau-Khalatnikov (L-K) equations describe NC by relating the derivative of P to time (t) and the derivative of free energy density to P [32][33][34]. The electrical characteristics of the NC-FinFET are determined by the coupling of threedimensional technology computer-aided design (TCAD) simulation with the L-K equation of the electric field across the ferroelectric film (E FE ) as a function of P. The L-K equation is shown as Eq. (8): Here, α, β, and γ are anisotropy constants, and is the viscosity coefficient that accounts for the dissipative process during polarization switching. These parameters are extracted by fitting the L-K equation to the experimental P-V hysteresis curves. E c refers to the minimum E FE needed to switch all the P r . They are characteristic parameters of NC measured from experimental P-V hysteresis curves and used to describe the value of C fe . Equation (8) indicates that the distribution of P and V int , capacitance match, gate control, and other performance parameters may depend on the properties of the ferroelectric film. Moreover, the gate control of the FinFET is also related to structural factors which are independent of the NC effect. Thus, the FinFET is simulated with PbZr 0.1 Ti 0.9 O 3 (PZT) [35], BTFM-CTO [36,37], and HfO 2 [38] film, respectively. PZT film is known for its superior ferroelectric properties but is limited by its poor compatibility with current integrated fabrication technology. BTFM-CTO film was successfully fabricated in our previous work, and its ferroelectric properties are weaker than that of PZT film, but it is based on GaAs substrate. HfO 2 film is widely used as a high-K gate dielectric and does not show ferroelectric properties. Therefore, HfO 2 is used as a dielectric material to clarify the gate control fluctuation of the FinFET, which is independent of the NC effect. The α, β, E c , and P r of PZT film are −6 × 10 10 cm/F, 5 × 10 18 cm 5 / (FC 2 ), 73 µC/cm 2 , and 3 MV/cm, respectively. The α, β, E c , and P r of BTFM-CTO film are −5 × 10 9 cm/F, 2 × 10 17 cm 5 /(FC 2 ), 96 µC/cm 2 and 0.341 MV/cm, respectively. In our simulation, C fe is not a fixed value, and it is calculated by solving the self-consistent L-K equation, which ensures the accuracy of the simulation results. |C fe | is estimated by with C fe the negative capacitance of the ferroelectric film, V int the internal voltage across the substrate capacitance (C s ), C gso the parasitic capacitance between the gate and source, and C gdo the parasitic capacitance between gate and drain Eq. (9) when P is considered independently of its size [39,40]. In Eq. (9), the A fe refers to the capacitance area.
Parameter g in Eq. (8) is a domain interaction constant. Compared with the metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structure, the NCFET without an internal gate shows steeper SS and larger I ON [41,42] when drain bias is high. MFMIS ensures uniform P in a ferroelectric film. Thus, it shows excellent performance with a short channel. However, when the channel is short, it is difficult for the internal metal gate to occupy the gate trench and support charge injection and accumulation. Therefore, the MFMIS structure is not adopted in the current simulation, and the nonuniform distribution of P still exists, which cannot be neglected. Additionally, structural factors affect the electric field intensity in the channel, and C int is related to the structural factors. Equations (3), (4), and (7) demonstrate that the gate control and drive strength are significantly dependent on C int . The drive strength of the transistor cannot be adjusted by changing its size when the current density in the channel is not resistant to structural factors, and C int fails to be kept constant. As a result, the drive strength and gate control of the NC-FinFET tend to be more sensitive to structural factors than the FinFET. Thus, P and V int are also investigated, which provide a reference for the analysis of transfer performance simulation results and reflect the variation in gate control. The Sentaurus TCAD system has been widely used to simulate the development and optimization of semiconductor technology and devices. Sentaurus tools obtain simulation results by solving partial differential equations such as diffusion and transport equations. This underlying physical approach ensures that Sentaurus can produce results with predictive value, and the accuracy can be approximately equal to that of the experiment. Therefore, when developing new semiconductor devices or processes, Sentaurus is widely adopted by the semiconductor industry to replace expensive and time-consuming wafer tests. As technology becomes more sophisticated, the semiconductor industry is more dependent on Sentaurus to reduce costs and accelerate research and development. In addition, Sentaurus is used to analyze, monitor, measure, and optimize the integrated circuit process flow and fluctuation.
The simulation results achieved in the current work are based on Sentaurus TCAD semiconductor simulation software. The movement of carriers induces the current. Therefore, the Poisson equation, carrier continuity equation, and L-K equations are solved using the self-consistent method to determine the distribution and movement of carriers. The L-K equation, which describes the NC effect, is only activated in a ferroelectric film. The NC-FinFET device is heavily doped in the current work, which introduces the doped impurity level into the energy band structure of the semiconductor material. Therefore, band gap reduction models are added to the simulation to quantify the band gap narrowing effect. Since the scattering of ionic impurities induced by dopants affects the migration of carriers and results in limited mobility, a mobility model that is dependent on the impurity concentration is adopted in the simulation. In addition, mobility is also related to the electric field. The mobility increases with electric field intensity but reaches saturation at a high electric field. Therefore, a high electric field mobility model is also added to the simulation. Because heavy doping introduces deep energy levels of impurities and defects, it leads to indirect recombination, affecting carrier life and device performance. Thus, the Shockley-Read-Hall (SRH) recombination model is adopted. The rate of electron and hole generation is dependent on the location and electric field intensity. Because of the nonlocal generation of electrons and holes in the tunneling path, the nonlocal band-to-band tunneling model is used in the simulation. Other nonideal factors such as interface states, temperature, and radiation are ignored in the current work. In our next work, we plan to investigate the effects of interface states and temperature on the NC-FinFET. Benefiting from the GVA and NDR effects, the NCFET tends to have relatively steep SS, large I ON , and small I OFF . However, limited by the relatively low carrier mobility and small energy gap of conventional silicon conductors, NCFETs based on silicon still suffer from the saturation of carrier mobility (SCM) and tunneling current, which limits further enhancement of the NCFET performance. Devices based on GaAs substrates are used extensively because of their high electron mobility and wide bandgap. GaAs is superior for use in high-electron-mobility transistors (HEMT) [43] and low-power-consumption applications [44]. Thus, the GaAs substrate is adopted in the NC-FinFET simulation model.
The parameters of the basic NC-FinFET remain unchanged except as otherwise noted. Key parameters include C W , C L , C H , T FE, and N D , with values as follows: C W = 20 nm, C L = 40 nm, C H = 45 nm, T FE = 12 nm, and N D = 1 × 10 18 /cm 3 . For accurate observation of the SS and gate control of the NC-FinFET, the supply voltage is 0.4 V, which ensures that the NC-FinFET is biased to operate in a weak inversion region. In this paper, I ON refers to the I D when V g equals the supply voltage, and I OFF refers to the I D when V g is zero. A multichannel structure [45,46] may resolve this problem at a high cost, and the drive strength is adjusted by changing the number of fins. The current simulation model adopted a representative multichannel structure, namely a dual-channel structure. Figure 2 shows the transfer performance of the dual-channel FinFET with N D varied from 2 × 10 17 /cm 3 to 1 × 10 18 /cm 3 . Figure 2a shows the variation in SS and I ON /I OFF , and Fig. 2b shows the variation in I ON and I OFF . The gate dielectric materials are HfO 2 , BTFM-CTO, and PZT, respectively. Figure 2 shows that the SS of the FinFET decreases with increasing N D . This decreasing tendency is significantly enhanced for NC-FinFETs. It is evident that the I ON of the FinFET with HfO 2 , BTFM-CTO, and PZT film decreases markedly, decreases, and increases with increasing N D , respectively. Moreover, the I OFF of the FinFET with HfO 2 or BTFM-CTO film decreases with increasing N D . In contrast, I OFF of the NC-FinFET with PZT film increases with increasing N D .

3 2 Simulation results of transfer performance
The variation tendency of I ON /I OFF with increasing N D is almost the opposite of that of I OFF . Figure 3 shows the transfer performance of the dualchannel FinFET with T FE varied from 6 to 16 nm. Figure 3a  shows the variation in SS and I ON /I OFF , and Fig. 3b shows the variation in I ON and I OFF . The gate dielectric materials are BTFM-CTO and PZT, respectively. Benefiting from the GVA effect, a large T FE leads to small SS and large I ON , in particular when the ferroelectric film is PZT, as shown in Fig. 3. This pattern is consistent with the conclusion deduced from Eqs. (3) and (6). The I OFF of the NC-FinFET with BTFM-CTO film demonstrates a clear decrease with increasing T FE . However, the PZT film achieves a minimum value at 10 nm T FE . When T FE is 16 nm, I OFF and I ON /I OFF are unexpectedly large and small, respectively. The variation in the I ON /I OFF of the NC-FinFET with PZT film is nearly the same as the corresponding variation in I ON , whereas that with BTFM-CTO film contrasts with the corresponding variation in I OFF . Figure 4 shows the transfer performance of the dualchannel FinFET with C L varied from 35 nm to 60. The gate dielectric materials are HfO 2 , BTFM-CTO, and PZT, respectively. It can be seen in Fig. 4 that the SS of the FinFET decreases with increasing C L , while the SS of the NC-FinFET increases with increasing C L , in particular when the ferroelectric film is PZT. I ON decreases with increasing C L . Another noteworthy finding is that the I ON of the FinFET with HfO 2 film decreases more dramatically than that with BTFM-CTO or PZT film. The I OFF of the FinFET with HfO 2 , BTFM-CTO, and PZT film decreases, increases, and increases markedly with increasing C L , respectively. The variation tendency of I ON /I OFF with increasing C L contrasts with that of I OFF . Figure 5 shows the transfer performance of the dual-channel FinFET with C W varied from 15 to 40 nm. Figure 5a shows the variation in SS and I ON /I OFF , and Fig. 5b shows the variation in I ON and I OFF . The gate dielectric materials are HfO 2 , BTFM-CTO, and PZT, respectively. From Fig. 5, we can observe that the SS of the FinFET with HfO 2 , BTFM-CTO, and PZT film increases, remains almost unchanged, and decreases with increasing C W , respectively. The I ON of the FinFET with HfO 2 or BTFM-CTO film decreases with increasing C W , while that with PZT film increases dramatically with increasing C W . It is noticeable that the I OFF of the FinFET with HfO 2 , BTFM-CTO, and PZT film increases slightly, decreases, and increases markedly with increasing C W , respectively. Moreover, the I OFF of the NC-FinFET with PZT film achieves a minimum value at 20 nm C W . The effect of C W on the variation tendency of I ON /I OFF contrasts with that of I OFF . Figure 6 shows the transfer performance of a singlechannel FinFET whose gate dielectric materials are HfO2, BTFM-CTO, and PZT. Its C W varies from 30 to 80 nm to maintain the same channel volume as the dual-channel Fin-FET. Overall, the variation in the transfer performance of the single-channel NC-FinFET with increasing C W is similar to that of the double-channel FinFET. A careful comparison between Figs. 5 and 6 reveals that the double-channel NC-FinFET tends to exhibit relatively large SS but large I ON and small I OFF compared with the single-channel NC-FinFET. Moreover, the drain current (I d ) decreases if the C W is too large (larger than 70 nm). Figure 7 shows the transfer performance of the dual-channel FinFET with C H varied from 30 to 80 nm. Figure 7a

Simulation results of polarization and potential
To precisely analyze the effect of structural factors on the performance of the dual-NC-FinFET and its gate control, the variation in V int and P with varying structural factors is investigated. This variation tendency reflects the fluctuation of gate control and nonuniform distribution of P. The variation in V int with and without 0.4 V V g bias reflects the GVA and NDR effect change, respectively. Moreover, P and V int are related to each other. The FinFET has three gates: the top, front, and back gates. The front and back gates form symmetry with each other. In the current work, they are classified as side gates. Side P and top P are defined to better describe the structure, which refers to the P located in the center of the side and top gate ferroelectric film. Similarly, side V int and top V int are defined, referring to the V int near the side and top gate. The value located in the center of the top and side represents the overall value. The variation tendency of side and top P with varying C W , C L , C H, and N D is shown in Fig. 8, indicating the overall variation tendency of P when structural factors are changed. The overall variation tendency of P increases when C W , C L , C H, and N D increase. Figure 8a shows that as C W increases, the increase in top P is greater than that of side P when the ferroelectric film is PZT. Figure 8b reveals that the increasing tendency of side P is more remarkable than that of top P when N D increases. Figure 8c indicates that top P achieves a maximum value at 40 nm C L and side P is relatively large when the dielectric gate film is PZT. Moreover, P is relatively insensitive to C L . The variation tendency of P with C H from 30 to 80 nm shown in Fig. 8d is not monotonic. Top P and side P achieve minimum values at 50 and 60 nm C H , respectively. When C H equals 80 nm, the P in the side PZT film is relatively large. Due to the lack of an internal metal gate, ferroelectric polarization is not uniform. The increasing P is distributed mainly in the bottom of the side film and the center of the top film. A possible cause is that the horizontal and vertical electric fields across the channel and ferroelectric film affect each other.
To simultaneously achieve superior performance and low power consumption, I ON transistors should be large and I OFF transistors should be as small as possible. Thus, V int should be high when V g equals V DD , while it should be low when V g is zero. To achieve this, optimal gate control is needed. Figure 9 shows the variation tendency of the side and top V int with (a, c) and without (b, d) 0.4 V V g , respectively. In Fig. 9a, b, C W is varied from 15 to 40 nm, and in Fig. 9c, d, N D is varied from 2 × 10 17 /cm 3 to 1 × 10 18 /cm 3 . It is clear in Fig. 9a that the top V int decreases with increasing C W , which indicates that gate control over the center of the top channel is weakened as C W increases. In contrast, the side V int increases with increasing C W , in particular when the ferroelectric film is PZT. Figure 9b shows that when V g equals zero, the top V int decreases with increasing C W .
Additionally, the side V int of the NC-FinFET with PZT film increases with increasing C W , while that with BTFM-CTO film decreases with increasing C W . Thus, the overall NDR effect and gate control are strengthened, and I OFF decreases with increasing C W when the ferroelectric film is BTFM-CTO film, while the opposite is the case with PZT filmt, as shown in Fig. 5b. Figure 9c, d shows that the side and top V int of the NC-FinFET with PZT film increase and decrease with increasing N D , respectively. Regarding the BTFM-CTO film, the increase in the side V int is smaller and the decrease in the top V int is larger. Therefore, when N D increases, the overall GVA and NDR effects of the NC-FinFET with PZT film are increased and decreased with increasing N D , respectively. Thus, when V g equals V DD , the gate control is increased, but when V g is zero, the gate control is decreased. Correspondingly, SS is steep, and I ON , together with I OFF , becomes significant with increasing N D . The variation tendency is almost the reverse when the ferroelectric film is BTFM-CTO, as shown in Fig. 2. Figure 10a shows that, overall, V int is slightly increased with increasing C L , which signifies that the GVA effect is enhanced and the NDR effect is weakened with increasing C L . The variation tendency of V int with increasing C H is shown in Fig. 10b, which is consistent with that of P, I ON , and I OFF . This trend is an overall but not monotonic increase. Figure 10c shows that when V g equals zero, both the top and side V int of the NC-FinFET with PZT film increase with increasing T FE . Thus, the NDR effect and gate control are weakened when V g is zero, and I OFF increases with increasing T FE . The opposite trend is seen if the ferroelectric film is BTFM-CTO, as shown in Figs. 3b and 10c.

Analyses and discussion
When V g equals V DD , the increase in V int is mainly distributed in the side surface channel, and the top V int decreases with increasing C W or N D , which indicates that the top and side gate control are weakened and enhanced, respectively. However, the overall GVA effect and gate control are enhanced when V g equals V DD , which results in steep SS and large I ON . This enhancement is weak when the ferroelectric film is BTFM-CTO. In comparison, the transfer performance of the FinFET with HfO 2 film deteriorates with increasing C W or N D , which is ascribed to inadequate gate control induced by large C W or N D . When V g is zero, overall, V int , in particular the side V int , increases with increasing N D or C W if the ferroelectric film is PZT. As a result, the overall gate control is weakened, and I OFF increases. Regarding the BTFM-CTO film, the increase in the side V int is not significant, while the decrease in the top V int is significant, which results in increased gate control. Correspondingly, I OFF of the NC-FinFET with PZT film is relatively large, as shown in Figs. 2, 5, and 9.
The increasing tendency of V int with increasing C L is not significant and that of C H is not monotonic. Consequently, gate control is weakened when V g equals zero and gate control is reinforced when V g equals V DD with increasing C H or C L . Theoretically, I d decreases as C L increases for the weak electric field between the drain and source. However, profiting from the reinforced gate control when V g equals V DD , the decrease in the I ON of the NC-FinFET with increasing C L is not significant compared with that of the FinFET. Moreover, the I OFF of the NC-FinFET with PZT film increases with increasing C L , which is attributed to the weak NDR effect and poor gate control when V g is zero.
Similarly, the NC-FinFET has steeper SS and large I ON and I OFF with large C H when compared with the FinFET, in particular if the ferroelectric film is PZT, as shown in Figs. 4b, 7, and 10a, b. Figure 10c shows that when V g equals zero, the V int of the NC-FinFET with PZT film increases, and gate control is weakened with increasing T FE . The variation tendency is the reverse for BTFM-CTO film. Figures 2,3,4,5,6,and 7 show that the superior ferroelectric properties of PZT film endow the NC-FinFET with steep SS and large I ON . However, the I OFF of the NC-FinFET with PZT film is relatively large and increases with increasing C W , C H , T FE , and N D (less than 20 pA). This phenomenon is markedly decreased when the ferroelectric film is BTFM-CTO, as shown in Figs. 2, 3, and 5. However, the transfer performance of the NC-FinFET with PZT film is sensitive to the variation in structural factors. In general, ferroelectric properties play an essential role in the performance of the NC-FinFET. The variation tendency of the transfer performance may even be reversed if the ferroelectric properties are changed. Figure 4 shows that when C L decreases, SS and I OFF of the NC-FinFET decrease, which is opposite that of the conventional FinFET and to the benefit of device scale-down. Moreover, the I ON of the NC-FinFET decreases slightly with increasing C L compared with that of the FinFET. Therefore, large C L seriously degrades the  Figure 8 shows that the overall variation tendency of P at 0.4 V V g increases when C W , C L , C H , and N D increase. The increase in P with increasing C W or N D is relatively large. The increased P is mainly distributed in the bottom of the side ferroelectric film and the center of the top ferroelectric film. The increase in side P is usually sharper than that of top P when C W or N D increases. Moreover, P is relatively insensitive to the variation in C H or C L . As a result, V int increases, and the gate control is enhanced. Thus, the NC-FinFET has a significant advantage over the FinFET regarding SS and I ON , in particular when the ferroelectric film is PZT. This advantage is reinforced by increasing C W , C H , and N D , which indicates that the overall gate control is enhanced by increasing N D , C H , and C W when V g is 0.4 V, as shown in Figs. 2, 5, and 7.
The drive strength of the MOSFET is adjusted by changing its width (W) and length (L). Regarding the FinFET, the equivalent W is defined by two parameters, C H and C W . However, this law does not precisely apply in the FinFET for the increase in gate control induced by variation in the structural factors. According to L-K equations, P is theoretically determined by V FE . However, due to the lack of an internal gate and the multi-domain structure of the ferroelectric material, the distribution of P and V int is not uniform. Thus, the gate control of the NC-FinFET is more sensitive than FinFET to the variation in structural factors. As noted, gate control is mainly reflected by transfer performance, especially the SS. Figures 2, 4, 5, and 7a show that the SS of the NC-FinFET with BTFM-CTO film is more resistant to the variation in structural factors.
As demonstrated above, the effect of structural factors on gate control depends on the ferroelectric film. Large C H or C W reduces the gate control, whereas NC can enhance the gate control. Supposing that a suitable set of structural to 80 nm. c Electronic potential in the center of the top and side channel with T FE varied from 6 to 16 nm and 0 V V g . d Transfer curve of the optimized single-channel NC-FinFET with 0.25 V V g factors and ferroelectric parameters is obtained, in that case, the balance between these two effects can be achieved, which means that the fluctuation in gate control with increasing C H or C W is significantly diminished. Large C L reinforces the gate control, however, NC weakens the gate control simutaneously. Likewise, the fluctuation in gate control with increasing C L can also be significantly diminished. Therefore, the drive strength of the NC-FinFET can be adjusted by changing its size without significant fluctuation in gate control if a suitable set of structural factors and ferroelectric parameters is obtained. Compared with other structural factors, increasing T FE and C H can significantly increase the I ON of the NC-FinFET with PZT film. However, this adjustment is inaccurate, as shown in Figs. 3 and 7. The multichannel structure is a promising alternative for adjusting the drive strength of the NC-FinFET, but further research is needed to reduce its cost and complexity. Figures 5 and 6 reveal that, given the same channel volume, the dual-channel NC-FinFET shows relatively large SS but large I ON and small I OFF compared with single-channel NC-FinFET. Figure 10d shows the transfer performance of the optimized single-channel NC-FinFET with PZT film. Its C W , C L , C H , T FE , and N D are 60 nm, 40 nm, 45 nm, 18 nm, and 1 × 10 18 /cm 3 , respectively. To better illustrate its superior performance, we compare this NC-FinFET and other NCFETs reported in a recently published review [47], as shown in Fig. 11. Here, V DD refers to the V g or V d , and some missing data are not given. Our designed NC-FinFET has relatively steep SS (37 mV) and small V DD (0.24 V), T FE (18 nm), and gate length (L G ) (40 nm), which is beneficial for the high performance of the NCFET. Moreover, profiting from high electron mobility and a wide bandgap, the NC-FinFET reported in the current work has a high I ON / I OFF value of 3.1 × 10 6 . Results achieved in the current work demonstrate that the GaAs NC-FinFET is a promising candidate for NCFET applications. The GaAs NCFET that we designed can be applied for the optimization of GaAs-based devices in memory or low-power applications.

Conclusion
In this work, a detailed simulation of an NC-FinFET was carried out to clarify the effect of crucial structural factors on the performance of the NC-FinFET, which is related to gate control. Simulation results show that the overall variation tendency of P and V int increases when C W , C L , C H , and N D increase. The increased P and V int are distributed mainly in the bottom of the side and the center of the top. Correspondingly, gate control is enhanced, which leads to steep SS and large I ON but large I OFF (less than 20 pA), in particular when the ferroelectric film is PZT. In general, ferroelectric properties play an essential role in the performance of the NC-FinFET. The effect of structural factors on gate control is usually the converse of that of NC on gate control. Supposing that a suitable set of structural factors and ferroelectric parameters is obtained, the appropriate balance between these two effects can be achieved, which means that the fluctuation in gate control can be significantly decreased. Thus, the drive strength of the NC-FinFET can be adjusted by changing its size, and a multichannel structure is not necessary. Given the same channel volume, the dualchannel NC-FinFET shows relatively large SS but large I ON and small I OFF compared with a single-channel NC-FinFET. Large C W , T FE , C H , and small C L are suggested to endow the NC-FinFET with steep SS and high I ON /I OFF . The current work provides new insights into the fluctuation of gate control with varying structural factors and adjustment of NC-FinFET drive strength, which are essential for the application of NC-FinFETs in analog circuits.