This paper compares the electrical characteristics of MOSFETs and tunnel FETs at different temperatures (300 ~ 10 K) by advance Sentaurus TCAD simulations at low temperature. we deliberated output characteristics of short-channel MOSFETs based on temperature. Our massiveness indicated that MOSFETs with drift-diffusion transport mechanism exhibit higher on-currents, and the subthreshold swing first decreases with temperatures linearly and then saturates at cryogenic temperatures due to source-to-drain tunneling. Also the output current is more when device cryogenically shift from 300K to 10K, However, our simulations reveal that the subthreshold swing of a tunnel FET is almost independent on temperatures. This wok also points out the challenges of a tunnel FET working at cryogenic temperatures.
Research Article
Characterization of Short-Channel MOSFETs and TFETs at Cryogenic Temperatures
https://doi.org/10.21203/rs.3.rs-1765177/v1
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cryogenic MOSFETs
TCAD
SS
Amazing advancement towards a silicon semiconductor in current years has drawn attention to the working of the semiconductor devices at cryogenic-temperature that works below 10K [1]. Cryo-MOSFETs reduce the overshoot interconnected with initialization, manipulation, data handling, fan in /out of devices and circuits. The power handling and consumption of semiconductor devices are limited at cryogenic temperature [2], however device keen to control and timing of signal. Application for low temperature device are found in many engineering fields such as space science, army related equipments, transportation and many more fields where low noise requirements needed [3]. For these application where power of input signal is weak and very high signal to noise needed, the execution can be magnified by cryogenic operations [4-5]. More efficient is another research area where low temperature designs are needed for fast execution and avoid thermal runaway. An improvement in performance can be found by cooling and below 10K in MOSFETs
Heat management of cryogenic CMOS (cryo-CMOS) working at 4 K may be an important issue as cryo-CMOS is a promising candidate of the electronic controller of individual quantum bits (qubits) at the mK-core [6-7]. The subthreshold leakage current of a MOSFET is a potential source of heat generation, hence it has captured much attention on subthreshold swing (SS) saturation of a MOSFET at cryogenic temperatures. SS saturation may be caused by non-ideal trap states at channel-oxide interface, band tail states [8-9] and source-to-drain tunneling (SDT) [8]. The later becomes more dominant when the channel length of a MOSFET is shorter. At cryogenic temperatures mobility of carriers in MOSFETs enhanced which leads to increase device efficiency because of higher drive currents, in spite of that threshold voltage increases with decreasing temperature, this may deliver room temperature low power semiconductor devices ineffective at cryogenic temperatures. [10]
Newly, tunnel field effects transistor (TFETs) is a Semiconductor device which works on the principle of quantum mechanical band to band tunneling. The dependence of TFET on cryogenic temperature is very limited, it has a unique stability in temperature, combination of BTBT and TAT are the main breakthrough at low temperature working in case of TFETs. Subthreshold slope is much degraded by band to band tunneling however BTBT responsible for main carrier transport [11].
A tunnel FET (TFET), on the other hand, is a transistor with the potential exhibiting steeper SS and better short channel control than a traditional MOSFET at room temperature [12]. It is known that SS of a TFET may be degraded by trap assisted tunneling [13], Auger generation [14] and band tails [15]. However, the impact of SDT on the SS of a short-channel TFET at cryogenic temperatures is still unclear. Therefore, we compare the electrical characteristics of MOSFETs and TFETs with different short channel length at cryogenic temperatures by TCAD simulations in this work.
The simulated MOSFET and TFET are shown in Fig. 1 and parameter definitions in table 1. The electrical characteristics are computed by solving self-consistently Poison and current equations with a quantum correction model and Fermi statistics [16]. In addition to the doping dependent mobility model, experimental values of phonon-dependent mobility are adopted [17]. Temperature and doping dependent Shockley-Read-Hall generation & recombination is activated and dopant freeze-out is not considered. In MSOFET and TFET simulations, nonlocal tunneling and nonlocal path band-to-band tunneling (BTBT) models are included as well, respectively. For the Ge-source TFET, only indirect BTBT is considered because all tunnel paths through Si channel [18].
Table .1. Specification used in TCAD simulation of MOSFETs and TFETs.
Fig. 2 presents the transfer characteristics and extracted average SS of MOSFETs with different LCH and T. Generally, the trend of MOSFETs is consistent with our previous results obtained by quantum mechanical simulations [6]. The SS saturates at a higher T when LCH is shorter because SDT is enhanced by a shorter tunnel length, and which is insensitive to temperatures.
Figs. 3 and 4 shows the transfer characteristics and average SS of full Si and Ge-source TFETs respectively with different LCH and T. It is well known that full Si MOSFETs outperform Si-based TFETs mainly due to less efficient indirect BTBT through a large bandgap [6]. This phenomenon becomes more pronounced while the carrier mobility and bandgap of the semiconductor increase with decreasing temperatures. The increase of bandgap is responsible for the increased threshold voltage due to the temperature decrease while more gate bias is required to enhance BTBT.
Contrary to the result of a MOSFET as shown in Fig. 2(b), the average SS of TFETs is almost independent on temperatures displayed in Figs 3 and 4. This can be explained by analyzing the tunnel length of a TFET working at different gate bias and temperatures in Fig. 5. Because BTBT current is a function of tunnel length, the variation of tunnel length with gate bias implies the average SS. As a consequence, the similar slope of the two lines in Fig. 5(b) accounts for the insensitivity of TFET to temperatures.
In our simulations, we consider the quantum correction model for both devices, which merely redistributes carriers at the channel-oxide interface and delays the threshold voltage. Field-induced quantum confinement (FIQC) and geometric quantum confinement (GQC) are not considered for TFETs because of following reasons: (1) FIQC may further delay the threshold voltage due to the widen bandgap but the average SS is barely influenced in deep subthreshold region [12]-[19]. (2) GQC increases the bandgap of Si only when the Si channel is thinner than 5 nm. (3) Although GQC should theoretically increase the
bandgap of Ge at 5 nm thickness, Ge-source region is not a small region in real devices [14]-[21]. Strain due to lattice mismatch between Si and Ge crystals is not involved in simulations. Moreover, inclusion of models mentioned above has caused or may cause convergence issues in our simulations.
This work has compared the electrical characteristics of MOSFETs and TFETs at low temperatures by using TCAD simulations. When decreasing the temperature, the average swing of MOSFETs first decreases linearly and then saturates at lower temperatures due to source-to-drain tunneling. When the channel length is shorter, swing saturates at higher temperatures.
When decreasing temperatures, the performance of a TFET is deteriorated in terms of larger threshold voltage and lower on-current due to the bandgap increase. Source-to-drain BTBT currents dominate the leakage current of a TFET with a short channel. Moreover, the swing of TFETs shows temperature insensitivity because the tunnel length is mainly influenced by gate bias.
Acknowledgment
This work was supported by the Young Scholar Fellowship Program from the Ministry of Science and Technology, Taiwan, under Grant MOST 109-2636-E-006-004. We thank National Center for High-Performance Computing of Taiwan for providing computational and storage resource.
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