In the digital world, all the transmitted data is vulnerable and prone to attack. To reduce the vulnerability, security is needed for the data. The security of the data can be enhanced by implementing cryptographic techniques. Thus, the sender and the receiver can only view the data by implementing cryptography, whereas a third party cannot intervene. Cryptographic algorithms are used in the IoT, online banking, Web servers, etc. The Advanced Encryption Standard (AES) is symmetric-key cryptography; it has the same key for both the encryption and decryption process. Each step in the AES algorithm is modified by using the key generated for each round, so each step of the AES is made key-dependent. This gives the dynamic AES algorithm. However, the delay and area are comparatively higher than the traditional method. Thus, the proposed method involves combining two steps, the sub-byte transformation and shifting rows. By doing this, the registers used to store the sub-byte data are removed. Thus, eliminating registers leads to less area consumption. Simulation is done using Verilog HDL in ModelSim and the synthesis is done in Xilinx Design Suite.
Research Article
AES Algorithm using Dynamic Shift Rows, Sub Bytes and Mix Column Operations for Systems Security wih Optimal Delay
https://doi.org/10.21203/rs.3.rs-1973978/v1
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Cryptography
Dynamic shift rows
Area
Sub Bytes and Security
An Integrated Circuit (IC) is a system on a chip. This is the field where more and more logic devices must be pushed into ever-smaller spaces. The first integrated circuits contained only a minimal number of transistors. This provides very few logic gates. Memory space is one of the important aspects of VLSI.
Cryptography is the technique of encrypting data and communication with codes to only be read and interpreted by those who need it. It is a word used in computer science to describe reliable information and communication solutions built on mathematical concepts that manage order-based calculations known as algorithms to convert communications in difficult-to-decipher ways. These pre-programmed algorithms are used to create cryptographic keys, digital signatures, data privacy verification, web browsing, and secure communications such as credit card transactions and email.
Attackers can overcome cryptography and access systems that handle encoding and decryption by exploiting weaknesses such as default keys. On the other hand, cryptography makes it more difficult for attackers to obtain access to messages and data that have been encrypted. Cryptosystems use a set of cryptographic methods, or cyphers, to encrypt and decrypt messages to ensure that connections between computer systems, devices, and applications are safe. One approach is used for encryption, another for message authentication, and another for key exchange in a cypher suite. This category has three main algorithms: hash functions, symmetric key functions, and asymmetric key functions.
Encryption methods generate a block cipher with a defined number of bits and a secret key that the creator or exporter uses to encrypt data and the acceptor uses to decrypt it using a single key or symmetrical key. The AES demonstrates symmetric key encryption.
AES is a symmetric, non-fiestel cryptographic method for protecting data transmitted over the internet from piracy and attacks. This research composition provides a substitute and effective vital dependent AES algorithm for securing the word over the internet or digitally secured at any remote location.The suggested approach provides a better avalanche effect and a stricter avalanche effect compared to the AES algorithm. After evaluating 1000 duos of samples of different secret keys, the proposed algorithm's results are obtained. As a result, new algorithms introduced 58 times out of 100 have a better avalanche impact than existing algorithms.
It has been found that the conventional AES algorithm can be reinforced by reducing the time complexity and space complexity of the system. The efficacy of the AES algorithm can be improved in terms of speed, size and memory of the system. The security of the AES algorithm can be assured for secure communication.
This paper is mainly structured as follows:Chap. 2 describes the existing design. Chapter 3 describes the proposed method. Chapter 4 describes the results and analysis, and Chap. 5 includes the conclusion.
In AES, add a round key section where the secret key is used. The secret keys are independent of all other transformations. Due to this, static operations can be changed. By eliminating this, more efficient AES algorithm technique operations can be performed based on key. All transformations assemble the result established on the key operation in each round, which makes AES dynamic.
The dynamic sub-byte transformation method performs non-linear conversion on the original byte of input status alone. In this perspective, all byte values are retrieved by the byte from the substitution box. The S-box won't be the same for all rounds of AES operations. The S-box can be hidden with a secret key in either of the two ways listed below. A byte-wise EXOR operation is performed on the subkey of that particular round [2].The S-box value is shifted cyclically left based on the EXOR value. This shifted value will replace the S-box value. During the decryption process, s-box values are rotated cyclically right. Then, the Inverse Sub Byte Transformation process is carried out to obtain the Inverse Sub Byte Transformation output.
In the dynamic shift row transformation method, the rows in the matrix are shifted. This step is made key-dependent by using the bit-wise EXOR operation [3]. After performing it, a parity value of either 0 or 1 is obtained. The shift row is performed in two ways [4]. If the parity is 1, the second row is rotated by one, and the fourth row is rotated three times [5]. If the parity is 0, the second row is rotated by one and the third row by two. The state matrix rows are shifted cyclically in the decryption process, as in encryption. The only difference is that the rotation is right [6–8].
A predefined matrix is multiplied by the Mix column's input matrix. This can also be made key-dependent using the parity values of the subkey of that particular round. Based on the parity value, the predefined matrix is chosen for multiplication.
1. The following matrix is used, if the parity is 1
2. The following matrix is used, if the parity is 0
Adding the round key is the secret key's sole operation to manipulate plain text. This EXOR operation is performed between the output matrix of the mix column method and the subkey of the specific round [9–10].
Figure 2.1 explains the encryption and decryption operation in the AES-128 bit, consisting of 10 rounds of each for the encryption and decryption processes. First, the plaintext and the secret key are given inputs for the encryption process to find the ciphertext.
The secret key is EXORed with the plaintext, and then ten rounds of operations are performed. Rounds 1–9 consist of four operations, namely sub-byte transformation, shift rows, mixing columns, and adding round keys. Only Sub Byte transformation, Shift Rows and Add round key are available in Round 10. At the end of round 10, ciphertext is obtained [11]. The ciphertext is given as input for the decryption process. First, the secret key is EXORed with the ciphertext, and then ten rounds of operations are performed. Rounds 1–9 consist of four functions, namely: inverse sub-byte transformation, inverse shift rows, add round key, and inverse mix columns. Round 10 has an Inverse Sub Byte transformation, Inverse Shift Rows, and an Add Round key only. At the end of Round 10, the plaintext is obtained.
All the methods of the AES algorithm are made key-dependent by using this method to increase security. On the other hand, the area consumption and the area utilized by the algorithm have been raised [12–16].
The Dynamic AES algorithm is modified by combining the Sub Byte and Shift Operations. The three transformations are present in Modified Dynamic AES: Combined sub bytes and shift rows transformation, combined inverse sub bytes and inverse shift rows, dynamic mix column/inverse dynamic mix column, and add round key.
The Sub Byte transformation is done with the help of a substitution box. First, an element in the input matrix is taken, and the S-box value is obtained. After obtaining the value from the S-box, it is shifted cyclically left for a particular number of times [17]. The number of rotations is obtained by taking the byte-wise EXOR value of the secret key. This operation is performed for every element in the input matrix. The shift row is made by cyclically shifting the rows of the input matrix based on the parity bit generated by EXORing the subkey of that particular round. For example, if the parity is 1, the second row is rotated by one and the fourth row is rotated three times. If the parity is 0, the second row is rotated by one and the third row by two. Here, these two transformations are combined with the help of multiplexers. After obtaining output from the S-Byte operation, the values are fed to the multiplexers instead of storing the values in the registers. The values, which are fed into multiplexers, are in such a way that they perform shift-row operations. Thus, sub bytes and shift rows are combined. With the help of this method, the registers used to store the output of the Sub Byte are eliminated, and the function call to the shift row method is also eliminated. With the removal of those registers, the amount of time required for storing and retrieving the data in those registers is saved [18–20].
A predefined matrix is utilized in the Mix column to multiply with the input matrix. This can also be made key-dependent using the parity value of the subkey of that particular round. Based on parity value, the predefined matrix is chosen for multiplication [21].
Add round key is the sole operation that uses the secret key to manipulate plain text. This EXOR operation is performed between the output matrix of the mix column method and the subkey of the specific round [22]. Figure 3.1 explains the encryption and decryption operation in the AES-128 bit, consisting of 10 rounds of each for the encryption and decryption processes. Plaintext and the secret key were given as the inputs for the encryption process to find the ciphered text. The secret key is EXORed with the plaintext, and then ten rounds of operations are performed. Rounds 1–9 consist of four processes: combined sub-byte transformation and shift rows, mixed columns, and adding round key. Round 10 has combined sub-byte transformation and shift rows and added round keys only. At the end of round 10, the ciphertext is obtained. The ciphertext is given as input for the decryption process. The secret key is EXORed with the ciphertext, and then ten rounds of operations are performed. Rounds 1–9 consist of four functions: combined Inverse sub-byte transformation and inverse shift rows; round key and inverse mix columns; and inverse mix columns.Round 10 combines the inverse sub-byte transformation and inverse shift rows and only adds the round key. The plaintext is obtained at the end of round 10 [23–27].
Let the plaintext be 00041214120412000c00131108231919 which is of size 128 bit, and the secret key be 2475a2b33475568831e2120013aa5481 which is of size 128 bit. The following topics show the encryption and decryption process.
|
Transformation |
Output at the end of the transformation |
|---|---|
|
Plaintext |
00041214120412000c00131108231919 |
|
Secret Key |
2475a2b33475568831e2120013aa5481 |
|
Add Round key |
2471b0a7267144883de201111b894d98 |
|
Round 1 |
|
|
Sub Key |
8955aecebd20f8468cc2ea469f68bec7 |
|
Combined Sub Byte and Shift Row |
b11de3e2bfc41f26393d3f147d1dd832 |
|
Mix Column |
139900279ba8bfce65d13da6a98603a6 |
|
Add Round key |
9accaee926884788e913d7e036eebd61 |
|
Round 2 |
|
|
Sub Key |
cefb681573db9053ff197a156071c4d2 |
|
Combined Sub Byte and Shift Row |
17989cfdfeaf14c3c305c198a0694f3c |
|
Mix Column |
fc7eb0dcda44273fcb09ecb1939f13a5 |
|
Add Round key |
3285d8c9a99fb76c341096a4f3eed777 |
|
Round 3 |
|
|
Sub Key |
h69e7ddc51a3c4d96e52537838554f351 |
|
Combined Sub Byte and Shift Row |
32bd09dd3dace00581821694d0799a5f |
|
Mix Column |
6ee0e336a45f911e080c86038b1d19e3 |
|
Add Round key |
07073ef3be63dc88ed29b1800e49eab2 |
|
Round 4 |
|
|
Sub Key |
41ea0c525bd641c4bef376473ba78516 |
|
Combined Sub Byte and Shift Row |
71fe3243ab69e13155ceac73ea71a1cd |
|
Mix Column |
2cf088aa859bebe7e39a92affe02404b |
|
Add Round key |
6d1a84f8de4daa235d69e4e8c5a5c55d |
|
Round 5 |
|
|
Sub Key |
0d7d4bb056ab0a74e8587c33d3fff925 |
|
Combined Sub Byte and Shift Row |
1ef1af268efc56a02603b413535153cd |
|
Mix Column |
bd2bc030ee372578eef463fbcbc9e876 |
|
Add Round key |
b0568b80b89c2f0c06ac1fc818361153 |
|
Round 6 |
|
|
Sub Key |
3be474d66d4f7ea28517029156e8fbb4 |
|
Combined Sub Byte and Shift Row |
3ff6e96f638ca86e7b2806f76d8d1447 |
|
Mix Column |
f987b1808fed165d7fd65d56051701a0 |
|
Add Round key |
c263c556e2a268fffac15fc753fffa14 |
|
Round 7 |
|
|
Sub Key |
e0ebf9678da487c508b385545e5b7ee0 |
|
Combined Sub Byte and Shift Row |
921de7d84c3c960b960b5363f6fda27d |
|
Mix Column |
1f8c11322d6b369d3cb2b89b855b6268 |
|
Add Round key |
ff67e855a0cfb15834013dcfdb001c88 |
|
Round 8 |
|
|
Sub Key |
5918183fd4bc9ffadc0f1aae8254644e |
|
Combined Sub Byte and Shift Row |
168a27fce07c9c6a18639b8ab985c8c4 |
|
Mix Column |
b84107b93fe8972ac316942bb5aba48a |
|
Add Round key |
e1591f86eb5408d01f198e8537ffc0c4 |
|
Round 9 |
|
|
Sub Key |
625b372cb6e7a8d66ae8b278e8bcd636 |
|
Combined Sub Byte and Shift Row |
f1408138d3a96088812c32e03597752f |
|
Mix Column |
80d1e0b9b5b239acbf6ff25d92b039e3 |
|
Add Round key |
e28ad7950355917ad58740257a0cefd5 |
|
Round 10 |
|
|
Sub Key |
31ad32b7874a9a61eda22819051efe2f |
|
Combined Sub Byte and Shift Row |
c4e77018dbb80c5118f748d6d6f3fef9 |
|
Add Round key/Cipher text |
e092d2abefcd5ad929155ad6c559aa78 |
Table 3.1 shows the encryption process from the start to the formation of the cipher text. The transformation has 10 rounds consisting of combined sub byte and shift rows, mix columns, and adding round keys in each round except Round 10, which has combined sub byte and shift rows, mix columns only.
|
Transformation |
Output at the end of the transformation |
|---|---|
|
Cipher text |
128'he092d2abefcd5ad929155ad6c559aa78 |
|
Secret Key |
128'h2475a2b33475568831e2120013aa5481 |
|
Add Round key |
128'hc4e77018dbb80c5118f748d6d6f3fef9 |
|
Round 1 |
|
|
Sub Key |
128'h8955aecebd20f8468cc2ea469f68bec7 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'he28ad7950355917ad58740257a0cefd5 |
|
Add Round key |
128'h80d1e0b9b5b239acbf6ff25d92b039e3 |
|
Inverse Mix Column |
128'hf1408138d3a96088812c32e03597752f |
|
Round 2 |
|
|
Sub Key |
128'hcefb681573db9053ff197a156071c4d2 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'he1591f86eb5408d01f198e8537ffc0c4 |
|
Add Round key |
128'hb84107b93fe8972ac316942bb5aba48a |
|
Inverse Mix Column |
128'h168a27fce07c9c6a18639b8ab985c8c4 |
|
Round 3 |
|
|
Sub Key |
128'h69e7ddc51a3c4d96e52537838554f351 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'hff67e855a0cfb15834013dcfdb001c88 |
|
Add Round key |
128'h1f8c11322d6b369d3cb2b89b855b6268 |
|
Inverse Mix Column |
128'h921de7d84c3c960b960b5363f6fda27d |
|
Round 4 |
|
|
Sub Key |
128'h41ea0c525bd641c4bef376473ba78516 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'hc263c556e2a268fffac15fc753fffa14 |
|
Add Round key |
128'hf987b1808fed165d7fd65d56051701a0 |
|
Inverse Mix Column |
128'h3ff6e96f638ca86e7b2806f76d8d1447 |
|
Round 5 |
|
|
Sub Key |
128'h0d7d4bb056ab0a74e8587c33d3fff925 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'hb0568b80b89c2f0c06ac1fc818361153 |
|
Add Round key |
128'hbd2bc030ee372578eef463fbcbc9e876 |
|
Inverse Mix Column |
128'h1ef1af268efc56a02603b413535153cd |
|
Round 6 |
|
|
Sub Key |
128'h3be474d66d4f7ea28517029156e8fbb4 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'h6d1a84f8de4daa235d69e4e8c5a5c55d |
|
Add Round key |
128'h2cf088aa859bebe7e39a92affe02404b |
|
Inverse Mix Column |
128'h71fe3243ab69e13155ceac73ea71a1cd |
|
Round 7 |
|
|
Sub Key |
128'he0ebf9678da487c508b385545e5b7ee0 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'h07073ef3be63dc88ed29b1800e49eab2 |
|
Add Round key |
128'h6ee0e336a45f911e080c86038b1d19e3 |
|
Inverse Mix Column |
128'h32bd09dd3dace00581821694d0799a5f |
|
Round 8 |
|
|
Sub Key |
128'h5918183fd4bc9ffadc0f1aae8254644e |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'h3285d8c9a99fb76c341096a4f3eed777 |
|
Add Round key |
128'hfc7eb0dcda44273fcb09ecb1939f13a5 |
|
Inverse Mix Column |
128'h17989cfdfeaf14c3c305c198a0694f3c |
|
Round 9 |
|
|
Sub Key |
128'h625b372cb6e7a8d66ae8b278e8bcd636 |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'h9accaee926884788e913d7e036eebd61 |
|
Add Round key |
128'h139900279ba8bfce65d13da6a98603a6 |
|
Inverse Mix Column |
128'hb11de3e2bfc41f26393d3f147d1dd832 |
|
Round 10 |
|
|
Sub Key |
128'h31ad32b7874a9a61eda22819051efe2f |
|
Combined Inverse Sub Byte and Inverse Shift Row |
128'h2471b0a7267144883de201111b894d98 |
|
Add Round key/Plain text |
128'h00041214120412000c00131108231919 |
Table 3.2 shows the decryption process from the start till the recreation of the plaintext. The transformation has ten rounds, each of which has a combined inverse sub byte and inverse shift row, an inverse mix column, and an adding round key, except for round 10, which only has a combined inverse sub byte and inverse shift row, an inverse mix column, and an adding round key.
The functional verification of the existing and proposed methodologies was done in ModelSim using Verilog. The Xilinx Design Suite was used to perform the synthesis, which helps to compare the area and delay of the existing and proposed methodologies [28–29].
Figure 4.1 shows the simulation result of the existing method for the encryption process. The Verilog code for the encryption process accepts two inputs and one output. The inputs are stored in the variables plaintext of size 128 bit and key of size 128 bit, whereas the output produced is stored in the variable en_msg of size 128 bit. The variable plaintext stores the message that needs to be encrypted, while the variable key stores the secret key used to encrypt the plaintext. The variable en_msg stores the encrypted version of the plaintext, also known as cypher text.
From Fig. 4.1, the input message used for the testing is given in hexadecimal format, which is 00041214120412000c00131108231919, and it is stored in plaintext. The key is also provided in hexadecimal format, which is 2475a2b33475568831e2120013aa548, and it is stored in the key. After simulatingin ModelSim, the output is produced in hexadecimal format as e092d2abefcd5ad929155ad6c559aa78, and it is stored in en_msg.
Figure 4.2 shows the simulation result of the existing method for the decryption process. The Verilog code for the decryption process accepts two inputs and produces one output. The inputs are stored in the variables en_msg of size 128 bit and cipher_key of size 128 bit, whereas the output produced is stored in the variable de_msg of size 128 bit. The variable en_msg stores the message that needs to be decrypted, while the variable key stores the secret key used to decrypt the en_msg. The variable de_msg stores the decrypted message.
From Fig. 4.2, the input encrypted message used for the testing is given in hexadecimal format, which is e092d2abefcd5ad929155ad6c559aa78, and it is stored in en_msg. The key is also given in hexadecimal format, which is 2475a2b33475568831e2120013aa548, and it is stored in the key. After simulating in ModelSim, the output is produced in hexadecimal format as 00041214120412000c00131108231919, and it is stored in en_msg [30].
Figure 4.3 shows the simulation result of the proposed method for the encryption process. The Verilog code for the encryption process accepts two inputs and one output. The inputs are stored in the variables plaintext of size 128 bit and key of size 128 bit, whereas the output produced is stored in the variable en_msg of size 128 bit. The variable plaintext stores the message that needs to be encrypted, while the variable key stores the secret key used to encrypt the plaintext [31]. The variable en_msg stores the encrypted version of the plaintext, also known as cypher text.
From Fig. 4.3, the input message used for the testing is given in hexadecimal format, which is 00041214120412000c00131108231919, and it is stored in plaintext. Furthermore, the key is also given in hexadecimal format, which is 2475a2b33475568831e2120013aa548, and it is stored in the key. Finally, after simulatingin ModelSim, the output is produced in hexadecimal format as e092d2abefcd5ad929155ad6c559aa78, and it is stored in en_msg.
Figure 4.4 shows the simulation result of the proposed method for the decryption process. The Verilog code for the decryption process accepts two inputs and produces one output [32]. The inputs are stored in the variables en_msg of size 128 bit and cipher_key of size 128 bit, whereas the output produced is stored in the variable de_msg of size 128 bit. The variable en_msg stores the message that needs to be decrypted, while the variable key stores the secret key used to decrypt the en_msg. The variable de_msg stores the decrypted message.
From Fig. 4.4, the input message used for the testing is given in hexadecimal format, which is 00041214120412000c00131108231919, and it is stored in plaintext. The key is also given in hexadecimal format, which is 2475a2b33475568831e2120013aa548, and it is stored in the key. After simulatingin ModelSim, the output is produced in hexadecimal format as e092d2abefcd5ad929155ad6c559aa78, and it is stored in en_msg.
Figures 4.5 and 4.6 represent the synthesis reports generated by Xilinx Design Suite software. The device xc7a200t with the package 3ffg1156 in the Artix7 family was used for the synthesis. The figures show the number of slices and the number of LUTs utilized by the proposed method.
Table 4.1 compares the results of the existing and proposed methods in terms of area and delay. Concerning the values present in the table, we can calculate the efficiency percentage of the proposed method for area and delay.
| Performance Metrics | Existing Method | Total | Proposed Method | Total | ||
|---|---|---|---|---|---|---|
| Encryption | Decryption | Encryption | Decryption | |||
| No. of LUTs | 15,121 | 14,935 | 30,056 | 12,227 | 12,579 | 24,806 |
| No. of Slices | 4,663 | 4,509 | 9,172 | 3,872 | 3,909 | 7,781 |
| Delay (in ns) | 55.617 | 55.356 | 110.973 | 52.701 | 54.01 | 106.711 |
| Performance Metrics | Percentage |
|---|---|
| Area (No. of LUTs) | 17.467% |
| Delay (in ns) | 3.841% |
Table 4.2 shows the efficiency of the proposed method when compared with the existing method. From Table 4.1, it can be observed that the proposed has less area consumption. The encryption and decryption processes of the existing method consume 15,121 and 14,935 LUTs, respectively, for a total of 30,056 LUTs. At the same time, the number of LUTs consumed by the encryption and decryption processes of the proposed method is 12,227 and 12,579, which produce a total of 24,806 LUTs. From Table 5.2, the proposed method has an area of 17.467% less than the existing method. This is due to a reduction in the number of registers used.
From Table 4.1, it can be observed that the proposed method has fewer delays than the existing method. The encryption and decryption processes of the existing system produce delays of 55.617 ns and 55.356 ns, which combine to produce a total delay of 110.973 ns. In contrast, the encryption and decryption processes of the proposed method produce delays of 52.701 ns and 54.01 ns, which combine to make a total of 106.711 ns. From Table 4.2, the proposed method has a delay of 3.841% less than the existing method. This is due to the reduction of registers while combing Sub Bytes and Shift Rows, which eliminates the storage and retrieval of data during the Sub Bytes transformation.
One of the most desired properties of cryptographic algorithms is the avalanche effect. It is measured by varying a single bit in the plaintext or the key, and the number of bits varied for that change. The following formula is used to find the avalanche effect:
% Avalanche effect = (nb / tb) x 100
where nb - number of bits changed in the output for the single-bit change
tb - total number of bits in the output
| Plaintext | Secret Key | Ciphertext | Change in bits | %Avalanche effect |
|---|---|---|---|---|
| 00041214120412000c00131108231919 | 2475a2b33475568831e2120013aa5481 | e092d2abefcd5ad929155ad6c559aa78 | 65 | 50.78 |
| 2475a2b33475568831e2120013aa5483 | 7ec33428038a6dde937069e3e61cb1b5 | |||
| 2475a2b33475568831e2120013aa5486 | 4ea5599fb300b3a057fdf0e5c92ce8b6 | 68 | 53.14 | |
| 2475a2b33475568831e2120013aa5487 | b5e4c3b1d53324aed8e859bd33cdbe4c | |||
| 2475a2b33475568831e2120013aa548c | 244a9f0a0d11cf47d7c4415a52b8b2d4 | 79 | 61.71 | |
| 2475a2b33475568831e2120013aa548d | bff680b1cce2211c2b6b54215141f1a3 |
Table 4.3 shows the avalanche effect calculation for the proposed method. Here, the plaintext of size 128 bit is constant, the secret key of size 128 bit is varied by one bit, and the cypher text of size 128 bit is generated for the inputs.A change in a single bit of the key has resulted in a drastic change in the ciphertext, making the algorithm more secure. The higher the avalanche effect, the more secure the algorithm. An more than 50% avalanche effect shows that the algorithm is more secure.
In this paper, a modified AES algorithm by combining the Sub Byte and Shift Row transformation of the Dynamic AES algorithm is proposed. In VLSI, power consumption, area, and delay are the factors determining the efficiency of the design. The AES algorithm is written using Verilog HDL in ModelSim, which is used to verify the functional correctness of the existing and proposed methods. The area and delay parameters are calculated using Xilinx. The device xc7a200t with the package 3ffg1156 in the Artix7 family is used for the synthesis. The combining of Sub Bytes and Shift Rows leads to the elimination of the registers consumed by the Sub Bytes module, which reduces the number of registers. By eliminating those registers, the time required to store and retrieve the data in those registers is minimized. In this way, the area and delay of the proposed method are reduced. The results show that the area consumed by the proposed method is 17.467% less than the existing method. The delay of the proposed is also reduced by 3.841%. In the future, the proposed AES algorithm could be used instead of the traditional AES algorithm for secure communication.
Funding – Not Applicable
Conflicts of interest/Competing interests
The authors whose names are listed immediately certify that they have NO affiliations with or involvement in any organization or entity with any financial interest or non-financial interest in the subject matter or materials discussed in this manuscript.
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Authors' contributions – All authors are equally contributed
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DATA AVAILABILITY STATEMENT
Data sharing is not applicable to this article as no datasets were generated or analyzed during the current work.
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