In this paper, a CMOS information transmission system with a capacitive isolation is proposed. Thanks to the incorporation of a high-pass filter, a high voltage common-mode existing between both transmission and reception sides of the transmission system can be suppressed leaving only the useful information signal transmitted across the capacitive isolation. The integration of two passive high-pass filters has been proposed in order to adapt to different applications. A detailed circuit performance analysis has been developed together with some circuit design considerations. The proposed circuits are designed and simulated in a CMOS 0.35µm technology. The simulation results show that the proposed system with a first order of high-pass filter can cope with a common-mode of voltage up to 40V at 1MHz with its immunity as high as 240V/µs while the proposed system with a second order of high-pass filter can deal with a common-mode voltage more than 100V with an immunity up to 720V/µs. The simulation results also show that with a carrier frequency of 100MHz and the input signal of 1MHz, the signal transmission delay and the power consumption are less than 10ns and 2.8mW for the first order filter system and 12ns and 2mW for the second order filter system.