Ultra-compact and low delay time all optical half adder based on photonic crystals

In this paper, an optical half adder is designed using photonic crystals. One of the features of this half adder is its small size. In the design of this structure, it has been tried to have a small size, shorter delay and high contrast ratio so that it can be used in the design of optical integrated circuits. For the sum and carry outputs, the obtained contrast ratio in the designed half adder is 15.4 dB and 7.4 dB, respectively. In addition, the proposed structure has a size of 70 µm2. The small size of this structure and the use of simple point defects, have caused the maximum delay time of this structure to be reduced to 0.07 ps. Due to these characteristics, this structure is suitable for high-speed optical integrated circuits.


Introduction
Nowadays microwave circuits such as filters, power dividers, couplers, and amplifiers are designed based on microstrip substrates (Hadei et al. 2022;Lalbakhsh et al. 2021aLalbakhsh et al. , 2021bJamshidi et al. 2021;Jamshidi et al. 2019;Roshani et al. 2020;Lalbakhsh et al. 2022;Karambasti et al. 2022;Adibi et al. 2021). Today, photonic crystals are used as a platform to design many analog and digital optical circuits. Photonic crystals are structures that can be alternated in one, two or three dimensions. Two-dimensional photonic crystals have more applications in the design of optical logic circuits because they can control light more than one-dimensional photonic crystals and their structural complexity is less than that of threedimensional photonic crystals (Maleki et al. 2020;Vahdati and Parandin 2019;Farmani 2017;Olyaee and Taghipour 2011;Parandin and Sheykhian 2022a;Soma et al. 2019).
There are various parameters in the design of these circuits that must be considered. An important issue in circuit design based on photonic crystals is the size of the circuits. The smaller size of the designed structures makes them more suitable for use in integrated optical circuits. Many articles use ring resonators that increase the dimensions of the structure. In addition, using more ring resonators in a circuit, increases the delay time and thus reduces the gate speed. Therefore, to design high-speed structures that can be integrated, the number of resonators must be reduced. Another parameter in the design of logic circuits using photonic crystals is the difference between two logic values, "0" and "1". Logic values of "0" and "1" are defined based on the amount of optical power. This means that if in an output, the optical power is close to zero, it is considered as "0" and if it is close to the power of the light source in the on state, it is considered as "1". In the design of logic circuits, it is necessary to increase the difference between two logic values to reduce the error in their detection.
Half adder is one of the most important digital circuits used for computational circuits. Some works have been done in the field of designing logical half adders based on photonic crystals. In some of them, the structure is very complex and large, which is unsuitable for optical integrated circuits. In some others, the structure is simpler, but the difference between two logical values is not appropriate.
In reference (Parandin and Malmir 2020), a hexagonal structure with a footprint of 159µm 2 is used, which has two ring resonators. In this design, the power value in 0 modes is high and has a low CR. In reference (Sonth et al. 2018), a square lattice structure is used. This structure has two entrances at the top and bottom and two outputs at the sides. This structure is large, and the amount of power in mode 1 is low. In reference (Serajmohammadi et al. 2018), the number of ring resonators in the structure is large, which has increased the size of the structure. In reference (Jalali-Azizpoor et al. 2018), the self-collimated beams method is used to design half adder. In this structure, the value of CR is low. In reference (Seifouri et al. 2019), simpler waveguides are used to propagate waves. This structure has a relatively large size. In addition, the structures designed in references (Nagarajan et al. 2022;Neisy et al. 2018;Pakrai et al. 2022) are big. In references (Nagarajan et al. 2022;Pakrai et al. 2022), the complexity of the structure is more due to the use of the ring resonator.
In this paper, we have tried to design a new structure for half adder that is suitable for integrated optical circuits. In designing the proposed structure, it has been tried that the output has low power for logic "0" mode and high power for logic "1" mode. Another point that has been considered in this structure is its simplicity so that it is easy to fabricate and it is suitable for optical integrated circuits.

Optical half adder
Half adder is a logical circuit that calculates the sum of two bits (A + B). A photonic crystal structure with a square lattice has been used to design the desired half adder. The type of photonic crystal is selected as GaAs rods in the field of air. The number of rods used in the structure is 15 × 15, i.e. 15 rods in the x direction and 15 rods in the z direction are located in two dimensions. These rods are in the air.
The refractive index of the rods is 3.37 at 1.55μm , and the air refractive index is 1. The structure lattice constant is assumed to be a = 0.6 μm. The radius of the rods is also considered as r = 0.2a. The results of the band structure for the prototype show that the photonic band gap (PBG) generated, is in the range of 0.29 to 0.42. Given that this distance is normalized ( a λ ) , its equivalent wavelength will be at a range of 1.42 < λ (µm) < 2.07. Figure 1 shows the afore-mentioned PBG range. Plane wave expansion (PWE) method has been used in band structure calculations. Photonic crystal structures use the PBG features. This property is created due to the alternating structure in micrometer dimensions. Therefore, the property of a range of wavelengths cannot enter the structure and is reflected after hitting the structure. This range of wavelengths is called PBG.
Given that this range includes a wavelength of 1.55μm , this wavelength is suitable for conducting light in the proposed structure. To design a half adder, one output and two inputs are needed where the light sources are placed in inputs. The connection between inputs and outputs is formed through waveguides. Linear and point defects are used to create waveguides. The waveguides must be installed in such a way that when light is transmitted to the output, the interaction of light and waveguides creates the necessary outputs. In other words, the waveguide paths and the defects are chosen in a way that if different states of the inputs occur, the interaction of the light and the defect rods causes the outputs to be created according to the half-adder accuracy table. It means if one of the inputs is on only, the sum output will be in the logic 1 state, and if both inputs are on, the carry output will be logic 1. Figure 2 shows the paths created for the half adder.
In the designed half adder, two linear defect paths are used for inputs A and B. These paths are named W1 and W2. For carry and sum outputs, two paths with linear defects are used, named W5 and W6. Routes W3 and W4 are also provided for the connection of inputs and outputs. Three-point defects have also been considered at the intersection of the input and output paths. Accordingly, rod "a" at the point of collision of paths W1 and W3 has a radius of 0.5r and is displaced by 0.2a from its location in the directions shown in the Fig. 2. In addition, the two rods "b" and "c" in the paths W2 and W5, both with a radius of 0.5r, are displaced by 0.2a and 0.1a, respectively, in the directions shown. Input sources are also located at the beginning of paths W1 and W2. Phase difference can be used for better circuit performance when both inputs are active. The simulation results show that the best phase difference for better structure performance is when input A has a 40° phase difference compared to other inputs.

Simulations and results
Finite Difference Time Domain (FDTD) simulation has been used to observe the optical power distribution in the half adder. When both inputs are off, since there is no other light source the optical power is zero in all directions and there is no power distribution. If one of the inputs is on only, i.e. when A = 0, B = 1 or A = 1, B = 0, the optical power distribution diagram shows that most of the optical power goes to the sum output and the carry output has very little power. Figure 3 shows the optical power distribution diagram for these two modes. As Figs. 3(a, b) show, the sum output can be considered as logic "1", and the carry output can be considered as logic "0". All outside parameters in simulation area is assigned as perfectly matched layer (PML) with a thickness of 0.5 µm. These calculations If both inputs are on, i.e., A = B = 1, the outputs are expected to be Sum = 0 and Carry = 1. It means that the power at output Sum should be low and output Carry high. These conditions can be created by the phase difference between inputs A and B. For this reason, in simulation, input A with phase is considered relative to input B. Then simulations are performed for different values of , and the results are shown in Fig. 4. According to Fig. 4, for = 40 o , output Sum has the lowest value, and output Carry has a high value.
In this case, light waves reach the defects from the two inputs. Due to the interaction of waves and defect rods, and due to the phase difference between the two sources, most of the power enters the carry output path and a very small amount of power is propagated to the sum output. Figure 5 shows the optical power distribution diagram for this mode.
The rest of the optical power is either reflected in the input paths or is lost due to the interference of the waves due to the phase difference that they have in relation to each other at the point of collision of the waves in different directions. In order to discuss the amount of optical power quantitatively, another simulation was performed for the half adder and the graph of optical power was calculated in terms of time, at the sum and carry outputs.   Figure 6 shows the optical power distribution at the sum output for different input modes. The calculated optical powers at the outputs are normalized and calculated relative to the light source in the "on" state. In other words, if P 0 indicates the power of the light source in the on state, the power obtained in each output is divided by P 0 and is considered the normalized output power. That is, the normalized power in each output is calculated as P out P 0 . In this half-adder simulation, the power of the input source in the "on" state is considered 1W∕ m 2 for different input modes.
As shown in Fig. 6, when both inputs are off, the power at the sum output is zero. In addition, when both inputs are on, i.e. when A = B = 1, the sum output is equal to 0.02. This value, which is very close to zero, can be considered as a logical "0". When A = 0, B = 1, the output power of sum is equal to 0.80. In addition, this output is equal to 0.70 for the case where A = 1, B = 0. Given that these values are close to the optical power of the source in the "on" state, they can be considered as a logical "1". Therefore, the sum output is in the logical "1" state when only one of the inputs is on. If the delay time is defined as the time required for the first output-to-input reaction, this time is very short in Fig. 6 and in the worst case is about 0.07 ps. That is, after this time the effect of input sources will appear on the output. In other words, the delay time is the time required for the output to reach 10% of its steady state after the input switches on.
The optical power at the carry output is shown in Fig. 7. This figure shows that the carry output is in the logical "1" state only, when both inputs are on. In other cases, this output is equal to logical "0". When both inputs are off, the carry output is also zero.
If the inputs are A = 0, B = 1, the output will be equal to 0.11. Also, if A = 1, B = 0, the amount of optical power in this output is equal to 0.10. These values can be considered as logical "0". If both input sources are on, then the carry output is 0.60, which can be considered as logical "1".
According to Fig. 7, it can be seen that the worst delay time for the half adder is related to the state A = 1, B = 0. This time is equal to 0.05 ps. This low delay time makes this structure suitable for high-speed integrated circuits. Table 1 shows the accuracy table of the half adder and the normalized output values in the various input modes. These values include optical power at sum and carry outputs.
To better evaluate the results of the proposed half adder, this structure has been compared with a number of other half adders published in reputable articles in recent years. Table 2 shows this comparison. Contrast ratio (CR) is one of the most important parameters in optical Fig. 6 Optical power at sum output logic circuits. This value represents the optical power difference between the two logic values "0" and "1" and is usually expressed in dB. The CR value is calculated using Eq. 1: In Eq. (1), P 1 is the output power in the logical state "1". If several output modes are in this state, the minimum value is considered. In addition, P 0 output power is logical state "0". If the number of outputs of "0" is more than one state, its maximum value is considered.
As Table 2 shows, the proposed half adder has the smallest size compared to previous works. In addition, the delay time of this half adder is less than all previous structures and is equal to 0.07 ps. The reason for reducing the delay time of this half adder, in addition to its small size, is also related to the small number of point defects because each of the point defects acts as a resonator and causes the coupling of light to the waveguide to be delayed. Therefore, a small number of point defects will reduce the delay time. In addition, the CR value for the sum output is 15.4 dB, which is increased compared to previous works. According to the results, this structure is small and its delay time is very brief, and therefore suitable for optical integrated circuits.

Conclusion
In this paper, a photonic crystal structure is proposed for the optical half adder circuit. In designing this structure, a square lattice is used and it is very small. The small number of point defects in the proposed half adder has reduced its delay time. The simulation results (1 ) CR = 10log P 1 P 0 Fig. 7 Optical power at carry output