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Research Article
Kwun-Bum Chung
Dongguk University
Corresponding Author
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TiOx-bsed resistive switching devices have recently attracted attention as a promising candidate for next-generation non-volatile memory devices. A number of studies have attempted to increase the structural density of resistive switching devices. The fabrication of a multi-level switching device is a feasible method for increasing the density of the memory cell. Herein, we attempt to obtain a non-volatile multi-level switching memory device that is highly transparent by embedding SiO2 nanoparticles (NPs) into the TiOx matrix (TiOx@SiO2 NPs). The fully transparent resistive switching device is fabricated with an ITO/TiOx@SiO2 NPs/ITO structure on glass substrate, and it shows transmittance over 95 % in the visible range. The TiOx@SiO2 NPs device shows outstanding switching characteristics, such as a high on/off ratio, long retention time, good endurance, and distinguishable multi-level switching. To understand multi-level switching characteristics by adjusting the set voltages, we analyze the switching mechanism in each resistive state. This method represents a promising approach for high-performance non-volatile multi-level memory applications.
Keywords
nanoparticles (NPs), ratio, long retention time, good endurance, TiO2, Ta2O5, HfO2
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No competing interests reported.
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Reviewer #5 agreed
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Reviewer #1 agreed
On 05 Mar, 2021
Reviewer #2 agreed
On 05 Mar, 2021
Reviewer #6 agreed
On 05 Mar, 2021
Reviewer #7 agreed
On 05 Mar, 2021
Reviewer #4 agreed
On 05 Mar, 2021
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This preprint is under consideration at Scientific Reports. A preprint is a preliminary version of a manuscript that has not completed peer review at a journal. Research Square does not conduct peer review prior to posting preprints. The posting of a preprint on this server should not be interpreted as an endorsement of its validity or suitability for dissemination as established information or for guiding clinical practice.
Learn more about In Review
Research Article
Kwun-Bum Chung
Dongguk University
Corresponding Author
Badges
Prescreen
This manuscript passed our Prescreen assessment
Complete author information
Appropriate declaration statements
Potential risks to human health
Prescreen
Peer Review Timeline
CURRENT STATUS: Under Review
Version 1
Posted 03 Mar, 2021
No community comments so far
Editorial decision: Major revision
On 18 Mar, 2021
Review #2 received
Received 11 Mar, 2021
Review #3 received
Received 11 Mar, 2021
Review #4 received
Received 11 Mar, 2021
Review #1 received
Received 11 Mar, 2021
Reviewer #3 agreed
On 05 Mar, 2021
Reviewer #5 agreed
On 05 Mar, 2021
Reviewer #1 agreed
On 05 Mar, 2021
Reviewer #2 agreed
On 05 Mar, 2021
Reviewer #6 agreed
On 05 Mar, 2021
Reviewer #7 agreed
On 05 Mar, 2021
Reviewer #4 agreed
On 05 Mar, 2021
Reviewers invited
Invitations sent on 02 Mar, 2021
Editor assigned
On 26 Feb, 2021
Editor invited
On 26 Feb, 2021
Submission checks complete
On 26 Feb, 2021
First submitted
On 25 Feb, 2021
Metrics
Comments: 0
PDF Downloads: ...
HTML Views: ...
License:
This work is licensed under a CC BY 4.0 License. Read Full License
TiOx-bsed resistive switching devices have recently attracted attention as a promising candidate for next-generation non-volatile memory devices. A number of studies have attempted to increase the structural density of resistive switching devices. The fabrication of a multi-level switching device is a feasible method for increasing the density of the memory cell. Herein, we attempt to obtain a non-volatile multi-level switching memory device that is highly transparent by embedding SiO2 nanoparticles (NPs) into the TiOx matrix (TiOx@SiO2 NPs). The fully transparent resistive switching device is fabricated with an ITO/TiOx@SiO2 NPs/ITO structure on glass substrate, and it shows transmittance over 95 % in the visible range. The TiOx@SiO2 NPs device shows outstanding switching characteristics, such as a high on/off ratio, long retention time, good endurance, and distinguishable multi-level switching. To understand multi-level switching characteristics by adjusting the set voltages, we analyze the switching mechanism in each resistive state. This method represents a promising approach for high-performance non-volatile multi-level memory applications.
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
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