The modification of micro scale roughness on the c-TiO2/perovskite interface
At first, we focused on a micro scale surface roughness of TiO2 and perovskite interface and adopted a flat FTO substrate as a means of improving the interfacial contact of TiO2 and perovskite layers as some studies have identified the presence of voids or gaps at the interface as a major issue that leads to poor PCE and stability of the device12,19. FTO substrate is a common material used as a transparent conductive oxide electrode in PSC devices though its surface typically exhibits a rough surface morphology with a scale of 0.5 to 1.0 μm that can exacerbate the physical gap in the interface. On the other hand, a FTO substrate used in this study has a flatter surface morphology than that of the generally used FTO substrate (Supplementary Figure 1). Thus, an introduction of the flatter FTO substrate is expected to improve the planarity of the interface, thereby reducing the likelihood of voids generates.
PSC device with a planer hetero junction structure was fabricated on the FTO substrate with a different surface morphology and its effect on a perovskite crystal deposited above was examined. For brevity, FTO substrate generally used in PSC device is denoted as “Rough FTO” and FTO substrate with a flatter surface morphology is denoted as “Flat FTO” respectively. Fig. 1 shows cross-sectional scanning electron microscopy (SEM) images of PSC devices prepared with the two FTO substrates having a different surface roughness. Further SEM images showing a wider range of the devices are shown in Supporting Figure 2. According to the SEM observations, few difference was observed in a film thickness of deposited layers depending on their FTO surface textures. The compact TiO2, perovskite (CH3NH3PbI3, MAPbI3), spiro-OMeTAD and Au back contact layer had an average thickness of 50 nm, 600 nm, 180 nm, and 80 nm respectively. Moreover, by focusing on the interface between the compact TiO2 dense layer and the perovskite layer, neither of the device had any noticeable gaps or voids at the TiO2 and perovskite interface, which had been proposed as a major concern by the previous studies12,19. This may be due to the fast crystallization deposition, a perovskite fabrication process that drips the antisolvent during the spin coating process23, that this antisolvent dripping and a following immediate annealing process will facilitate the rapid crystallization of perovskite crystals, which may eventually lead to a formation of a minute nano crystal and thus did not generate a gap between the compact TiO2 and perovskite layer.
However, when focused on the perovskite layer itself on the other hand, there was a significant difference appeared at the crystal morphology depending on the surface roughness of their FTO substrate. The perovskite layer that was fabricated with the Rough FTO substrate exhibited large crystal grain boundaries toward different directions throughout the film with a grain size of 300 to 500 nm. Furthermore, since the compact TiO2 layer was deposited along with the rough surface morphology of the FTO substrate, the TiO2 layer with a thickness of maximum 50 nm seems to be heavily affected by the Rough FTO’s morphology. Consequently, crystal growth direction of the perovskite layer was also likely to be affected by the morphology, which is demonstrated in Fig.1(a). On the other hand, the compact TiO2 layer deposited on the flat FTO had a flatter and more uniform surface in response to the morphology of the FTO substrate. Surprisingly, the perovskite layer fabricated with the Flat FTO substrate had much fewer grain boundaries than that of the perovskite layer with the Rough FTO. In addition, boundaries were generated more toward the vertical direction than the horizontal direction, which is apparent in Fig. 1(b).
Surface morphology of the perovskite films deposited on the underlayer with a different surface morphology was also examined by the top view SEM observation shown in Supporting Figure 3. Both perovskite films were uniformly covered with a grain size of around 100 to 500 nm without any notable pinholes regardless of the surface morphology of FTO substrates. Further examination by X-ray diffraction (XRD) measurement is also shown in Supporting Figure 4. The diffraction patterns confirmed that both perovskite films have a crystal structure of an unoriented tetragonal MAPbI3 that is well consistent with the diffraction pattern shown by the previous report24. Despite the basic composition and crystal structure did not exhibit any noticeable differences, their perovskite film quality seems to vary significantly depending on their underlayer’s morphology.
The substantial improvement derived by the surface modification was also examined by the current – voltage (I-V) measurement of the solar cell devices. I-V curves and each photovoltaic parameters of PSC devices fabricated with rough and flat FTO substrates are shown in Fig. 2 and Table 1. For the evaluation of I-V hysteresis, the hysteresis factors16, defined by Eq. (1) below for the perovskite solar cells was calculated.
$$Hysteresis factor=(PC{E}_{reverse} - PC{E}_{forward}) / PC{E}_{reverse} \cdots Eq.\left(1\right)$$
Despite both samples have the same device structure and material compositions, the introduction of flat FTO in PSC devices also showed a clear enhancement of the photovoltaic performances. The device with flat FTO exhibited an increase in Voc and fill factor (FF), which resulted in an improvement of overall PCE. Moreover, despite the mismatch between compact TiO2 and perovskite layer, that had been previously demonstrated as a potential cause of I-V
Table 1 Photovoltaic parameters of solar cells fabricated with rough FTO and flat FTO.
Sample
|
Scan direction
|
Jsc
(mAcm-2)
|
Voc
(V)
|
FF
(-)
|
PCE
(%)
|
Hysteresis factor (-)
|
Rough
FTO
|
Fwd
|
20.9
|
0.94
|
0.30
|
6.0
|
0.41
|
Rev
|
21.2
|
1.02
|
0.46
|
10.0
|
Flat
FTO
|
Fwd
|
19.5
|
1.03
|
0.62
|
12.4
|
0.17
|
Rev
|
19.5
|
1.08
|
0.72
|
15.1
|
hysteresis, was not observed in our devices, I-V hysteresis behavior also showed a difference by their FTO surface morphology. This result may be induced by the perovskite layer with diminished horizontal grain boundaries, which will facilitate a carrier transportation and eventually led to the better device performance. Indeed, grain boundaries existing in the crystal have been reported to hinder a carrier transport or cause an undesired recombination of carriers, which can eventually lower the photovoltaic performance. These undesirable characteristics have been reported not only for perovskite solar cells but also for multi crystalline silicon solar cells25,26. deQuilettes and co-workers examined the effect of microstructure on carrier dynamics in perovskite thin films according to the photoluminescence spectroscopy 18. They reported that grain boundaries showed lower photoluminescence and exhibited a faster nonradiative decay compared with those of bulk perovskite crystals. There is also a report that a device with potassium doped perovskite could diminish the grain boundary of perovskite layer and achieved a hysteresis free photovoltaic performance27,28. Their results are consistent with our suggestion that carrier recombination and/or internal resistance were successfully prevented by the elimination of grain boundaries, which may eventually lead to the improvement of solar cell performances. Our results also indicate that presence of grain boundaries in the perovskite crystal may also be a crucial factor that causes I-V hysteresis in PSC devices.
The modification of nano scale roughness on the c-TiO2/perovskite interface
Secondly, based on the abovementioned results we further discuss the effect of TiO2/perovskite interfacial contact on the deposited perovskite crystal by modifying a nano meter scale surface roughness. Herein, we fabricated a nanoparticle TiO2 layer on top of the compact TiO2 dense layer to create a mesoscopic structured PSC device, which has been reported to have a higher efficiency than the device with the planar heterojunction structure. Using two types of FTO substrates, Rough FTO and Flat FTO, a compact TiO2 dense layer was deposited followed by a TiO2 mesoporous layer. The deposition of the perovskite layer, the hole transport layer, and the gold electrode was carried out in the same manner as the process for the planer hetero junction structure.
Cross sectional SEM images of PSC devices fabricated with and without mesoporous TiO2 layer are shown in Fig. 3 (SEM images showing a wider range of the mesoscopic structure device are also shown in Supporting Figure 2). Both devices had almost the same film thickness for the compact TiO2, perovskite, Spiro-OMeTAD and Au electrode with a thickness of 50 nm, 600 nm, 180 nm, and 80 nm respectively. For the mesoscopic structure device, mesoporous TiO2 layer was introduced on top of the compact TiO2 layer with an average thickness of 100 nm. As with the result shown in Fig. 1, while the perovskite layer fabricated with the planer hetero junction structure exhibited the severe grain boundaries toward various directions, the perovskite film fabricated on the mesoporous TiO2 layer appeared with the much smoother surface as well as the much less grain boundaries that their horizontal direction almost disappeared. This feature is consistent with the result obtained in the SEM images of the planer hetero junction structure device fabricated with the flat FTO. This result demonstrates that the introduction of mesoporous TiO2 layer induced the perovskite crystal to interlock with the pores of TiO2 nanoparticles with filling the gap produced from the rough surface morphology of the FTO substrates. Therefore, the growth direction of the perovskite crystal was controlled, resulting in a dense film with significantly diminished grain boundaries. According to the top view SEM observation shown in Supporting Figure 3, the perovskite film was uniformly covered with a grain size around 100 to 500 nm and there was no apparent difference in the perovskite morphology compared with other perovskite films. Further examination by XRD measurement confirmed that the perovskite film fabricated on mesoporous TiO2 layer is a tetragonal MAPbI3 without any preferential orientations (Supporting Figure 4). While the device with rough FTO presented a considerable development by the application of mesoporous TiO2, the device with flat FTO did not show such a notable difference in presence of mesoporous TiO2 layer. However, as the Supporting Figure 5 shows, grain boundaries were effectively diminished, and the perovskite morphology improved slightly compared with the planer hetero junction device. It has been pointed out that among the papers achieving the highly efficient PSC devices, mesoscopic structure account for a large part of the reports and thus the investigations for the reason why mesoscopic structure affords superior performance may be a key for the further improvement of PSCs11. They noted the effective electron extraction derived by a large area contact between the perovskite and TiO2 layer as a possible advantage of mesoscopic structure, but our results also indicate another possible role of mesoscopic structure, which controls the crystal growth of perovskite leading to the formation of a higher quality film with less grain boundaries.
Table 2 Photovoltaic parameters of solar cells fabricated with planer and mesoscopic structure.
Sample
|
Scan direction
|
Jsc
(mAcm-2)
|
Voc
(V)
|
FF
(-)
|
PCE
(%)
|
Hysteresis factor (-)
|
Planer
structure
|
Fwd
|
20.9
|
0.94
|
0.30
|
6.0
|
0.41
|
Rev
|
21.2
|
1.02
|
0.46
|
10.0
|
Mesoscopic structure
|
Fwd
|
23.9
|
1.04
|
0.59
|
14.6
|
0.19
|
Rev
|
23.9
|
1.08
|
0.70
|
18.0
|
Solar cell performance of the planer hetero junction and mesoscopic structured devices are summarized in Fig. 4 and Table 2. The device fabricated with Rough FTO which showed I-V hysteresis in planer hetero junction structure achieved a significant improvement by the introduction of the mesoporous TiO2 layer that the PCE showed more than 1.5 times larger value than that of the planer structured devices. In addition, while the device with planer hetero junction structure showed a large hysteresis in I-V measurement, hysteresis factor decreased as half of the planer hetero junction structure’s value in mesoscopic structure devices.
On the other hand, the device with Flat FTO which showed the improvement of PCE and I-V hysteresis with the planer hetero junction structure did not show a notable improvement in I-V hysteresis, although the photovoltaic parameters and overall PCE improved by introducing a mesoporous TiO2 layer (Supporting Figure 6). However, Rough FTO obtained a higher short-circuit current value than that of the Flat FTO, as shown in Table S1. This trend was also observed for the device in planer hetero junction structure as shown in Table 1. This may be due to the flat surface morphology that Flat FTO has, which reflects incident light and causes loss of absorbed light, while Rough FTO has a rough surface morphology that causes the reabsorption of reflected light and thus possible to absorb light more than the Flat FTO.
As confirmed by SEM observations, mesoscopic structure devices with both rough and flat FTO exhibited the improvement in perovskite morphology indicating the further efficacy of the surface treatment of TiO2 layer on perovskite crystallization. In addition to the enhancement in the perovskite crystallinity, an increase in the coverage area of the perovskite layer by TiO2 nanoparticles will lead to an efficient electron injection, which will be associated with the improved the photovoltaic characteristics of the mesoscopic structure devices. At the same time, since it is deposited with a thickness of around 100 nm, the TiO2 nanoparticles eliminated the gaps between TiO2 and perovskite layer within a nano meter scale, and therefore seems to obscure the impact of macro scale surface modification derived by the flat FTO.
In summary, we examined the effect of improving the interfacial contact of TiO2/perovskite on the crystallinity of the fabricated perovskite layer as well as the subsequent photovoltaic characteristics of the solar cell devices. First, we introduced a FTO substrate with a smoother surface morphology as a method to eliminate the micro scale voids between TiO2 and perovskite layers. Then a mesoporous TiO2 layer was introduced for the further nano scale modification of TiO2 and perovskite contact. SEM observation revealed that not only the interface between the TiO2 and perovskite layers, but also the perovskite morphology showed a drastic improvement by the introduction of flat FTO substrate. Along with exploring the impact of surface treatment on the perovskite crystallinity, we also confirmed the improvement of PSC device photovoltaic characteristics as well as the I-V hysteresis. The observed enhancement is also confirmed by inducing the mesoporous TiO2 layer that the presence of grain boundaries across the entire film resulted in a noticeable decrease with a conventional FTO substrate associated with the notable improvement of I-V hysteresis and photovoltaic characteristics. These results clearly demonstrated that the modification of compact TiO2 and perovskite interface not only improves the contact, but also gives a significant impact on the crystal morphology of the perovskite layer. As the photovoltaic performance including I-V hysteresis changed in response to the perovskite morphology, the presence of grain boundaries inside perovskite layers is also likely to be responsible for the cause of I-V hysteresis. Our results emphasize the importance of underlying surface morphology on the resulting perovskite film quality, which will contribute to the further development of the perovskite crystallization process in future.