Geometric design of TE legs
The maximum output power (Pmax) of TEGs is defined using Eq. (1).
$${P}_{max}=\frac{{S}^{2}{Δ T}^{2}}{4{R}_{el}}=\frac{(S{Q{R}_{th})}^{2}}{4{R}_{el}},$$
1
where S is the Seebeck coefficient, ΔT = QRth is the created temperature difference, where Q is the heat flowing through a TE leg, Rth is the thermal resistance, and Rel is the electrical resistance of a TE leg. To maximise Pmax in this simple relation, the optimisation of Rel and Rth is generally conducted with the parameter of the aspect ratio of a cuboid TE leg because they have a trade-off relationship with respect to the length and cross-sectional area of the TE leg. In the TE leg, Rel and Rth can be defined using Eq. (2).
$${R}_{el}={\int }_{0}^{L}\frac{dl}{\sigma A},$$
2
$${R}_{th}={\int }_{0}^{L}\frac{dl}{kA},$$
where L is the vertical length, σ is the electrical conductivity, k is the thermal conductivity, and A is the cross-sectional area of the TE leg45. The geometric parameter of \({\int }_{0}^{L}\frac{dl}{A}\)of the TE leg is present in Eq. (2). Because several factors affect the overall output power of a device, such as the temperature dependencies of σ and k, convection areas, and conduction path, this geometric parameter could be more flexible and effective for maximising Pmax than the aspect ratio of a cuboid leg. For example, LeBlanc and coworkers investigated the influence of TE leg shapes by simulations, finding that the hourglass- and trapezoid-shaped TE legs generate more power than twice as much as the cuboid27. To design geometry of Cu2Se TE leg, we developed a 3D FEM model for the eight different geometries of the TE legs and comparatively computed their Rel, ΔT, output voltage, and Pmax (Fig. 1a). We chose these geometries by considering the geometric parameters of \({\int }_{0}^{L}\frac{dl}{A}\), for which the selected geometries were varied (Supplementary Table 1), the conduction path (Y-shape and reverse Y-shape) or holes in it (multi-hollow rectangle). Also, we set a fixed temperature of 873 K on the hot side, while the cold side was subjected to forced convective conditions.
As shown in Fig. 2a the truncated pyramid and hourglass with higher Rth and larger geometric parameter than those of the cuboid are expected to produce the higher ΔT and resulting Pmax compared with the cuboid (Supplementary Figs. 1 and 2), though they have a higher Rel. The Y-shaped leg with the same geometric parameter as the cuboid exhibited a slightly higher ΔT owing to a longer thermal conduction path. However, its Pmax decreased with an increase in the Rel. The multi-hollow rectangular leg exhibited properties identical to those of the cuboid because of the same cross-sectional area profile. Another important parameter, namely the cooling surface, was identified by comparing the reverse structures with the primary designs, showing the opposite trends of ΔT and the resulting Pmax to their primary designs. For example, the reverse truncated pyramid and inverse hourglass that have smaller convection areas exhibited considerably lower ΔT and Pmax values. Owing to expansive cooling surface and high geometric parameter value, the truncated pyramid and hourglass are recognized as the best geometries, generating 35% and 31% higher Pmax values, respectively, of that of the cuboid.
In addition, we extended our simulation to a TE device consisting of a single leg of a truncated pyramid, hourglass, and cuboid (Fig. 2b–d, Supplementary Fig. 3), where the TE leg was sandwiched between the top and bottom Cu electrodes and Ag paste solder layers, including the measured contact resistance (Rc) (Supplementary Fig. 4).46 The hourglass, which has the highest power due to its lower Rc than those of the cuboid and truncated pyramid, was expected to generate 87% more power than that of the cuboid.
Finally, the area ratio (β/α) optimisation was performed on the hourglass, where β represents the areas of the top and bottom surfaces and α represents the area at the centre (Fig. 2f). With an increase in the area ratio to approximately 10, the ΔT, and resulting output voltage values abruptly increased, while the electrical resistance decreased (Supplementary Figs. 5 and 6). Above an area ratio of 12, all values were nearly saturated or changed slowly, but the output power decreased owing to the increase in the electrical resistance. Overall, the output power was maximised at an area ratio of 11.7, at which the predicted output voltage and power were 24% and 131% higher than those of the cuboid.
3D printing of the geometrically designed Cu2Se
To achieve ink-extrusion-based 3D printing of Cu2Se, we formulated a Cu2Se particle-based colloid ink with the desired viscoelasticity. Such rheological properties of inks are crucial for ensuring consistent ink flow throughout the deposition and retainability of printed structures after deposition. Our group has previously reported the extrusion-based 3D printing of Cu2Se inks whose rheological properties were tailored by the addition of Se82− polyanions33. In the current study, we further increased the concentration of solutes in the glycerol solvent medium, resulting in a higher viscosity (Supplementary Fig. 7). This rheological modification improved the 3D printability of our inks to make them directly writable, which enabled us to build complex architectures, including hourglass, arch, and lattice structures constructed by directly written filaments (Fig. 3a and Supplementary Movies 1–3). Optical microscopy and scanning electron microscopy (SEM) images of the printed filaments (Fig. 3b–f) show their smooth surface and uniform thickness. Moreover, after heat treatment at 1233 K, the primary shape of the filament was preserved perfectly without structural distortion. Additionally, the as-printed filament had a diameter of approximately 210 µm while the sintered filament uniformly shrank to a diameter of approximately 160 µm after the heat treatment, indicating densification of the printed filament.
TE properties of the 3D-printed Cu2Se
The use of Se82− polyanions as rheology-modifying additives also promotes the sintering of Cu2Se. Upon heat treatment, Se82− polyanions are decomposed into the Se phase at ~ 140 ºC among Cu2Se particles (Supplementary Fig. 8) and induce the liquid-phase sintering of Cu2Se particles due to the relatively low melting point of Se (~ 220 ºC). We investigated the effect of sintering temperatures on the TE properties of samples (873, 1053, and 1233 K). The SEM images show that all samples sintered at 873, 1053, and 1233 K have well-fused grains with multiple pores in their microstructures, suggesting a sintering effect of the Se82− polyanions (Supplementary Fig. 9) 28–33. Also, excess Se polyanions allowed us to control the composition of Cu2 − xSe because elemental Se gradually evaporates during sintering. X-ray diffraction (XRD) patterns of the samples sintered at 873, 1053, and 1233 K revealed that the Cu1.8Se phase mixed with the Cu2Se phase was observed in the sample sintered at 873 K, and the peaks of the Cu1.8Se phase progressively disappeared with increasing sintering temperature (Fig. 4a). At 1233 K, the XRD pattern shows only the peaks corresponding to the Cu2Se bulk phase without any peaks related to the Cu1.8Se phase.
We measured the temperature-dependent TE properties of the 3D-printed, heat-treated samples at 873, 1053, and 1233 K from room temperature to 1000 K. The formation of the Se-rich Cu2 − xSe phase in our samples enabled control of the hole concentration of the samples because the Cu vacancies in Cu2 − xSe are known to act as hole donors (Fig. 4b). Hall measurement results reveal that the hole concentration decreased from 2.39 × 1020 to 8.09 × 1019 cm− 3 as the heat treatment temperature increased, indicating the controlled formation of the Cu vacancy depending on the sintering temperatures. The hole mobilities of the samples also decrease with increasing sintering temperature. This trend can be understood by considering the defect formation in the sintered samples at higher temperatures.
Room-temperature electrical conductivity gradually decreased with increasing the sintering temperature (Fig. 4c). Meanwhile, the Seebeck coefficient at room temperature increased with increasing the sintering temperature from 873 K to 1233 K (Fig. 4d). This trend indicated that the Seebeck coefficient were inversely proportional to the carrier concentration47,48. The electrical conductivity decreased as a function of temperature for all the samples over the entire temperature range, whereas the Seebeck coefficients were positive. These dependencies agree with the reported trends for Cu2Se materials and indicate the behaviour of typical heavily doped semiconductors41,42,49. The highest power factor of 9.38 µW∙cm− 1∙K− 2 was achieved by the 873 K-sintered sample at 1000 K (Supplementary Fig. 10).
Over the entire temperature range, the samples sintered at higher temperatures exhibited lower thermal conductivities (Fig. 4e and Supplementary Fig. 11). The 1233 K-sintered sample exhibited the lowest thermal conductivity of 0.33 W∙m− 1∙K− 1 at 950 K, which was lower than the reported values of bulk polycrystalline Cu2Se materials and similar to those of the recently reported state-of-the-art Cu2Se TE materials. In previous reports, the remarkably low thermal conductivity of Cu2Se was achieved by strategies to create unique microstructures, such as mosaic nanostructuring50,51, the fabrication of nanocomposites52,53, incorporation of carbon allotropes54–56, and atomic defect engineering57.
To understand the extremely low thermal conductivity of the 3D-printed Cu2Se, the sample sintered at 1233 K was analysed using transmission electron microscopy (TEM). The TEM images (Fig. 4f and Supplementary Figs. 12) clearly show dense array textures in the microstructures. These textures originate from the formation of SFs (Fig. 4g), which is further confirmed by the selected-area electron diffraction pattern (Fig. 4h) that possesses a (004) slip plane. The presence of diffuse streaks surrounding each diffraction pattern provides clear evidence that the microstructure corresponds to an SF in the planar defect58–60. Moreover, we observed the formation of dislocation defects surrounded by SFs (Supplementary Figs. 13). In the sample sintered at 873 K, arrays of SFs were partially detected just near the grain boundary. Moreover, the Se-rich Cu1.8Se phase was clearly detected, as confirmed by the fast Fourier transform image obtained from the TEM image of the surface (Supplementary Fig. 14).
The formation of SFs has been widely studied in materials with mixed phases, where a dislocation is created at the phase boundary between the two phases owing to lattice strain, which consequently creates an SF by dislocation propagation61–64. The interaction between Cu2Se particles and Se additive resulted in the formation of Se-rich Cu1.8Se alongside the Cu2Se matrix phase in our samples as evidenced by XRD patterns (Supplementary Fig. 15). This intermediate phase can be attributed to lattice strain caused by the lattice mismatch between orthorhombic Cu2Se and cubic Cu1.8Se, leading to the creation of dislocations and dense stacking faults (SFs) within the 3D-printed Cu2Se samples. Notably, at elevated sintering temperatures, the diffusivity of Se ions escalated65, facilitating their migration into Cu2Se grains and promoting the development of Cu1.8Se phases in larger regions during the intermediate state. Consequently, this process contributed to the widespread presence of SFs throughout the Cu2Se grain during subsequent heat treatment. This scenario is supported by the observation of SF arrays in all the grains of the sample sintered at 1233 K, whereas SFs were observed only at the grain boundary of the sample sintered at 873 K. The enlarged XRD patterns (Supplementary Fig. 15) and TEM results affirmed these observations, revealing peak shifts and heightened lattice strains as sintering temperatures or holding times increased. Remarkably, particle surface of the 873 K-sintered sample predominantly exhibited the Cu1.8Se phase.
Utilizing the Debye–Callaway model encompassing phonon scattering mechanisms such as Umklapp processes, grain boundary scattering, point defects, dislocations, pores, and SF scattering, we quantified the attained minimum lattice thermal conductivity (κl). Figure 4i represented the frequency (ω)-dependent κl for distinct scattering models, uncovering variations. Contrary to Umklapp processes, point defects, dislocations, and pores primarily impacted low- and high-frequency phonons, showing minimal effect on middle-frequency phonons. Conversely, SFs exhibited substantial phonon scattering reduction across all frequencies, including middle-frequency phonons. Figure 4j demonstrates the accordance between experimental and theoretical data, solidifying the existence of SF-mediated phonon scattering. Remarkably, κl decreases at higher sintering temperatures alongside increased SF density, affirming SFs' role in modifying thermal conductivity.
Because of such unique microstructures and the resulting low thermal conductivity, the calculated ZT values from the measured electrical and thermal properties reached 2.0 at 950 K for the sample sintered at 1233 K. This sample exhibited higher ZT values than those of the samples sintered at lower temperatures over the entire temperature range. Moreover, this maximum is higher than the values reported for polycrystalline bulk Cu2Se43. Although this value is slightly lower than the recently reported state-of-the-art Cu2Se with carbon-introduced materials54–56, doping53, and nano-size compositing effect52 to the best of our knowledge, this is the first demonstration of the achievement of higher ZT values in printed TE materials compared to their bulk values (Supplementary Table 2).
Evaluation of 3D-printed Cu2Se TEGs
To experimentally validate the design obtained by the FEM simulations, devices were chipped with three different TE legs using cuboid, reverse hourglass, and hourglass geometries fabricated by 3D printing (Fig. 5a–c) and the Cu plate electrodes using Ag paste as the solder. Additionally, we maintained identical hot-side temperatures during the measurement of the power-generating performance using a ceramic heater to heat the tops of the modules while cooling the bottoms using a water-circulating cooler with a constant water flow rate and temperature. As the temperature increased, all modules exhibited nearly linear increases in the output voltages and quadratic increases in the output power, indicating the reliability of the measurements (Fig. 5d–f). At the hot side temperature of 873 K, the hourglass-TEG exhibited a cold-side temperature of 354 K, which was significantly cooler than the temperatures of 549 and 463 K observed in the reverse hourglass- and cuboid-TEGs, respectively (Fig. 5g). The temperatures on the cold sides are in good agreement with the simulation results. Moreover, the resulting output voltages of the three designs were in accordance with the temperature difference trends. Consequently, the hourglass-TEG showed an output power and power density of 242 mW/cm2 under a temperature difference of 518 K (Fig. 1c and 5h), which was approximately 2.7 times higher than those exhibited by the cuboid-TEG. These results demonstrate the feasibility of our design strategy for enhancing the power-generation performance of TEGs.