“Zero change” platform for monolithic back-end-of-line integration of phase change materials in silicon photonics

doi:10.21203/rs.3.rs-3298710/v1

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“Zero change” platform for monolithic back-end-of-line integration of phase change materials in silicon photonics

https://doi.org/10.21203/rs.3.rs-3298710/v1

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Monolithic integration of novel materials for unprecedented device functions without modifying the existing photonic component library is the key to advancing heterogeneous silicon photonic integrated circuits. To achieve this, the introduction of a silicon nitride etching stop layer at selective area, coupled with low-loss oxide trench to waveguide surface, enables the incorporation of various functional materials without disrupting the reliability of foundry-verified devices. As an illustration, two distinct chalcogenide phase change materials (PCM) with remarkable nonvolatile modulation capabilities, namely Sb₂Se₃ and Ge₂Sb₂Se₄Te₁, were monolithic back-end-of-line integrated into silicon photonics. The PCM enables compact phase and intensity tuning units with zero-static power consumption. Taking advantage of these building blocks, the phase error of a push-pull Mach-Zehnder interferometer optical switch could be trimmed by a nonvolatile phase shifter with a 48% peak power consumption reduction. Mirco-ring filters with a rejection ratio >25dB could be applied for >5-bit wavelength selective intensity modulation, and waveguide-based >7-bit intensity-modulation photonic attenuators could achieve >39dB broadband attenuation. The advanced “Zero change” back-end-of-line integration platform could not only facilitate the integration of PCMs for integrated reconfigurable photonics but also open up the possibilities for integrating other excellent optoelectronic materials in the future silicon photonic process design kits.

Physical sciences/Optics and photonics/Optical materials and structures/Silicon photonics

Physical sciences/Optics and photonics/Applied optics/Integrated optics

Physical sciences/Physics/Electronics, photonics and device physics/Photonic devices

Silicon photonics holds broad prospects for practical applications in high-speed optical communication¹, microwave photonics², optical neural networks³, and optical quantum computing⁴. Accurate modulation of waveguide refractive index and absorption is critical for effectively implementing functional units in silicon photonics, facilitating precise control and adjustment of functionality within silicon photonic networks⁵. However, current modulation schemes in photonic chips primarily rely on modulation approaches such as thermo-optic modulation and free-carrier dispersion in silicon, exhibiting weak modulation strength (usually with the change of effective refractive indices Δn_eff <10^− 3) and necessitating a continuous power supply⁶. This leads to large device sizes and high static power consumption in photonic chips, limiting progress in large-scale optoelectronic integration.

Introducing innovative materials for function units in silicon photonics has become imperative to attain exceptional device performance and reduce power consumption⁷. Various materials such as electro-optic polymer⁸, metal-insulator-transition oxide⁹, and 2D materials¹⁰ had been integrated for ultra-compact or ultra-fast volatile light modulation. An ongoing trend to integrating nonvolatile modulated materials such as charge-trapping materials^11,12, ferroelectric materials¹³, and chalcogenide phase change materials¹⁴ is crucial for lowering the static power consumption of reconfigurable photonic circuits¹⁵. Despite the significant progress in prototype devices with exceptional performance, the fabrication process flows are incompatible with the existing silicon photonics foundry process, rendering the established passive and active photonic component design kits unsuitable for direct application¹⁶.

Enabling the monolithic integration of functional materials into silicon photonics while maintaining the existing fabrication process and using the available process design kits (PDKs) is of utmost importance¹⁵. Chalcogenide phase change materials, such as an example, can be directly deposited on silicon and have attracted significant attention thanks to their nonvolatile properties^17–20, making them promising candidates for compact (~ 10 µm) and zero-static power photonic devices. In the past decades, a plethora of PCM-integrated reconfigurable photonic devices have been extensively developed for intensity modulation^21–29, phase tuning^30–33, and light path switching^34,35. Moreover, they play a crucial role in constructing photonic networks and serve as essential elements for optical storage³⁶, in-memory computing³⁷, and analog optical computing^38,39. Despite the significant advancements in PCM-integrated photonics, the full compatibility of integrating PCMs into the entire silicon photonics fabrication flow remains highly challenging. Therefore, an imperative back-end integration approach is urgently needed to facilitate the post-processing integration of PCMs, thereby enhancing the feasibility of large-scale integration of nonvolatile reconfigurable optoelectronic chips.

In this paper, a“Zero change” platform for a monolithic back-end-of-line integration scheme facilitating the large-scale integration of PCM-based photonic devices was demonstrated. By customizing the full process flow of silicon photonics and introducing a CMOS-compatible silicon nitride (SiN) layer as an etch stop layer on Si waveguides, a deep SiO₂ trench was etched with a low insertion loss of < 0.09 dB/trench for subsequent integration of various PCMs. Two kinds of chalcogenide phase change materials (PCMs), Sb₂Se₃ and Ge₂Sb₂Se₄Te₁(GSS4T1), with completely different nonvolatile modulation capabilities, were monolithically back-end-of-line integrated into silicon photonics. Electrical-assisted programmability of the fabricated devices was verified, enabling reconfigurable post-trimming, multi-level nonvolatile phase modulation, and intensity modulation in optoelectronic chips. This endeavor not only showcased the back-end-of-line integration technique for combining phase change memory (PCM) with silicon photonics but also accomplished this without the need to modify the existing library of passive and active photonic components. Furthermore, it establishes a clear path for integrating other promising optoelectronic materials into future silicon optoelectronic chips.

Back-end-of-line integration of PCMs into commercial silicon photonics platform

Large-scale fabrication based on the CMOS platform without modifying the existing passive and active photonic component library is essential for realizing various practical applications of PCM-based nonvolatile electrically programmable photonic chips. However, PCM is a kind of material that is incompatible with standard CMOS processes. Therefore, a back-end-of-line integration of PCMs is coveted for commercial photonics platform-compatible nonvolatile devices. Here, we propose a trench etch process utilizing SiN as the etch stop layer to realize deep SiO₂ cladding etching above the functional areas (where PCM would be deposited), which is suitable for developing CMOS back-end integration of multiple functional materials⁴⁰.

The SiN-assisted silicon photonic process was conducted on a 200-mm wafer at the IMECAS foundry, including the low-loss SiO₂ trench etching atop the functional areas. The integration of PCM was accomplished by a back-end-of-line process involving ultraviolet lithography and film deposition, which exhibits significant potential for facilitating large-scale integration. The customized silicon photonic process incorporating a layer of SiN serves as an etch stop layer to preserve the Si waveguide from damage during the etching of SiO₂ trenches (see Fig. 1(a)). Firstly, the patterning of photonic devices, implantation, and ion activation was implemented on a 200-mm SOI wafer comprising a 220-nm silicon layer on top of a 2-µm buried oxide layer. Secondly, a sequential deposition of a 5-nm SiO₂ and a 20-nm SiN was performed, followed by lithography and etching techniques to fabricate the etch stop layer. Following the deposition of SiO₂ and subsequent metal interconnection, the silicon oxide above the waveguides in functional areas of the photonic devices was selectively etched. Due to the high etching selection ratio (> 50:1) between SiO₂ and SiN, the etching process is effectively halted at the etch stop layer (SiN), thereby preventing damage to the silicon waveguide. Finally, a wet etch process was employed to remove the SiN layer above the functional areas.

Benefiting from the etch stop layer, waveguides with low-loss narrow SiO₂ trenches were realized, with their measured transmission spectra shown in Fig. 1(b), where the numbers of cascaded trenches are 10, 20, and 30, respectively. The cut-back measurement suggested that the insertion loss introduced by a single trench is as low as 0.083 dB at 1550 nm, as shown in Fig. 1(c). The low-loss trenches provide a convenient approach for the back-end integration of PCMs, facilitating compatibility with available silicon photonic devices in commercially available PDKs. To prevent any performance degradation of the device, the post-processing temperature should be lower than 450 ℃⁴¹. Additionally, post-fabrication patterning was accomplished exclusively by ultraviolet lithography, thereby possessing the potential for large-scale integration with high throughput. The detailed fabrication process flowchart for the back-end integration of PCMs is illustrated in Fig. 1(a). The PCM thin film was deposited through magnetron sputtering followed by a lift-off process upon the SiO₂ cladding trench window (process temperature < 150 ℃). Afterward, the chip was annealed at 200 ℃ and 300 ℃ in a nitrogen atmosphere for 15 minutes to facilitate the crystallization of Sb₂Se₃ and GeSbSe₄Te₁, respectively. A 30 nm-thick Al₂O₃ protective layer was then deposited by atomic layer deposition (process temperature < 150℃). Finally, the contact window above the metal electrode was etched to ensure electrical interconnection (process temperature < 110℃). Figure 1(d) illustrates the functional region's structure after fabrication. The electro-thermal control of the PCM induced by the PIN diode enables a nonvolatile response of the effective refractive index in the hybrid waveguides.

Back-end integrated SbSe enabled trimming of push-pull MZI switch

Silicon photonic devices inevitably suffer from fabrication errors and consequent deviation of performance from the intended design. Meanwhile, the device-to-device deviations could be significantly magnified in networks, leading to an increased complexity when configuring PICs. Post-fabrication trimming (PFT) enables the calibration of the photonic devices after their fabrication. Compared to other trimming methods, including femtosecond-laser annealing⁴² and Ge ion implant-and-annealing^43,44, active and reversible trimming enabled by PCM manipulation³⁰ possesses a significantly improved degree of freedom. In this section, we demonstrate the post-fabrication active trimming technique by electrically fine-tuning a low-loss Sb₂Se₃ patch integrated using back-end integration.

The schematic diagram in Fig. 2(a) illustrates the device structure and operational principle of low-loss PCM-based PFT, exemplified by a push-pull MZI switch. A section of p-i-n doped Si waveguide, covered with a patch of Sb₂Se₃, was employed as a trimming unit. An identical structure was set on another branch of the MZI to achieve optical loss equilibrium. During the PFT, a sequence of electrical pulses is applied to the trimming unit, thereby triggering the amorphization of Sb₂Se₃ and inducing a nonvolatile change of the refractive index in the Sb₂Se₃/Si hybrid waveguide. Therefore, the optical power between the two output ports gradually achieved equilibrium, accompanied by the balance of drive voltage.

The microscope image of the push-pull MZI is presented in Fig. 2(b). Before PFT, as shown in Fig. 2(c), the optical power-voltage (O-V) curve suggested that the optical power splitting ratio between two output ports was larger than 6 dB at 0 V, the drive voltage for the bar state(cross state) was − 1.03 V (0.93 V), corresponding to a power consumption of 4.55 mW (1.00 mW). Additionally, a significant optical power imbalance spanning the C-band was observed, as shown in Fig. 2(d). Therefore, the insertion loss of the bar and cross states exhibited significant disparities due to the inherent losses associated with carrier injection-based phase modulation. (> 0.4 dB at 1550 nm. The measured spectra can be found in Fig. S1(a) of SI.1).

After applying a series of electrical pulses with varying amplitudes (ranging from 3 V to 6 V with an interval of 0.01 V) and a fixed pulse duration of 500 ns, precisely control over the amorphous-and-crystalline-mixing state of Sb₂Se₃ was achieved, thereby enabling device trimming without impact on the electrical property of the device (see Fig. S1(b) in SI.1). The imbalance between the two ports was reduced to 0.110 dB at 0 V, as depicted by the O-V curve in Fig. 2(e). The bar and cross states' drive voltage was reduced to -0.98 V (yielding a power consumption of 2.33 mW) and 0.97 V (yielding a power consumption of 2.01 mW), respectively. This thereby reduced the voltage disparity from 0.1 V to 0.01 V, as well as improved total and peak power efficiency by > 20% and > 48%, respectively. Moreover, the trimming unit effectively equalized the splitting ratio of both output ports across the entire C-band (see Fig. 2(f)). The imbalance of insertion loss at the bar (2.69 dB) and cross (2.62 dB) states was effectively minimized to a mere 0.07 dB at 1550 nm while simultaneously ensuring an extinction ratio > 20 dB in both states (see Fig. 2(g)). The insertion loss of the trimming unit is 0.46 dB, estimated using the cut-back method, as detailed in SI.2. The characterization of the push-pull MZI without Sb₂Se₃ also confirms that the primary source of insertion loss does not originate from the trimming unit(see SI. 3), but primarily from the propagation loss of the Si waveguide and the mode mismatch between the straight and bend sections. The trimmed MZI exhibits a high switching speed with 10–90% rise and 90 − 10% fall times of 9.26 ns and 9.81 ns, respectively (see Fig. S1(c) in SI.1). Additionally, the on-off switching (> 10⁷) and storage at room temperature (12 days) has no significant impact on the optical performance of the device, indicating that the Sb₂Se₃-based trimming unit is a reliable method for PFT (refer to SI.1 for detailed measurement results).

The Sb₂Se₃-based trimming unit provides a reliable PFT technique, which not only achieves a balance of the drive voltage and insertion loss but also significantly reduces both the total and peak power consumption of a push-pull MZI. The embedded trimming units are essential for simplifying the control and reducing the power consumption of very large-scale PICs.

Reconfigurable nonvolatile multi-level low-loss phase modulation

The compact nonvolatile multi-level phase modulation not only mitigates static power consumption but also enhances integration density, making it a promising candidate for constructing reconfigurable PICs such as microwave photonics⁴⁵, quantum computing⁴⁶, and coherent optical computing⁴⁷. Here, we demonstrated a low-loss multi-level phase modulation using a back-end integrated SbSe/Si hybrid waveguide in a microring resonator(MRR).

The nonvolatile MRR switch, featuring an 8 µm-long SbSe/Si hybrid waveguide, is shown in Fig. 3(a). A ~ 25-nm SbSe patch was adopted to mitigate mode mismatch loss arising from the interface between the bare silicon waveguide and the SbSe/Si hybrid waveguide (see SI.4 for a detailed analysis of loss induced by mode mismatch). The reversible switching was achieved by applying a 7.15 V/500 ns pulse for amorphization and a 2.25 V/100 ms pulse for crystallization, resulting in an extinction ratio (ER) larger than 25 dB at 1551.513 nm (see Fig. 3(b)). The observed change in the measured spectra indicates that a phase shift of ~ 0.3π was achieved, accompanied by a crystallization-induced loss of 0.0223 dB/µm.

To achieve multi-level switching, two types of manipulating pulses were employed, including electrical pulses with varying amplitude and fixed duration (PVAFD) and pulses with varying duration and fixed amplitude (PVDFA). The change in transmittance (\({\Delta }T\)) at 1551.145 nm was utilized for monitoring the nonvolatile multi-level phase modulation exhibited by the MRR. As shown in Fig. 3(c), 36-level (> 5-bit) crystallization was realized by applying PVAFD with an interval of 0.01 V. However, achieving higher levels of nonvolatile switching using PVAFD with an amplitude interval smaller than 0.01 V poses a significant challenge. Hence, the PVDFA exhibits a potential for accommodating more distinguishable states during inducing multi-level crystallization due to the presence of numerous pulses (nearly 10⁵ at a resolution of 1 µs) with durations < 100 ms. Here, a quasi-continuous switching was achieved by applying PVDFA with gradually increased duration (see Fig. 3(d)). The demonstration of 500 switching events was also presented (see Fig. 3(e)).

The back-end integrated SbSe/Si hybrid waveguide offers a reversible low-loss phase modulation, enabling fine multi-level switching by employing PVDFA, providing an attractive fine-phase tuning solution for large-scale PCM-driven photonic networks.

Reconfigurable nonvolatile multi-level intensity modulation

Intensity modulation has been widely used in optical computing⁴⁸, optical communication⁴⁹, and microwave photonics⁵⁰. GSS4T1, a novel material possessing a low-loss amorphous state and a lossy crystalline state at telecom wavebands¹⁹ emerges as a promising candidate for nonvolatile intensity modulation when compared with traditional GST material. Here, we pioneered the demonstration of an electrically programmable waveguide-integrated broadband optical attenuator employing back-end integrated GSS4T1.

The back-end integrated photonic attenuator offers a high extinction ratio with a small footprint (16 µm), owing to the high extinction coefficient contrast (Δk = 0.549) between different states of our sputtered GSS4T1 films (see Fig. 4(a)). The microscope image of the fabricated device is shown in Fig. 4(b). The reversible multi-level switching of the photonic attenuator was achieved by applying PVAFD, as shown in Fig. 4(c) and Fig. 4(d). The insertion loss and extinction ratio were measured to be 2.91 dB and 39.5 dB, respectively. Furthermore, a multi-level intensity modulation exceeding 180-level (> 7 bits) was achieved by applying PVDFA (see Fig. 4(e)). After 1500 switching events, there is no obvious deterioration in the device’s performance (see Fig. 4(f)). Further switching events, both with and without an optimized coupling efficiency of the grating coupler after the cyclic measurement, suggest that the observed increase in optical loss can be attributed to a shift in the coupling state.

Although fine-tuning for any target state can always be accomplished via multiple fine-correction pulses akin to the trimming process, the arbitrary state configuration is essential in certain scenarios. The arbitrary state configuration is usually accomplished by applying an amorphization pulse followed by a crystallization pulse. Through this process, we were able to realize a > 3-bit arbitrary state configuration for the GSS4T1-based attenuator. By applying pulses with varying amplitude (varying duration), a total of 7 (13) distinguishable states were achieved (see Fig. 4(g) and (h)).

We have demonstrated a back-end integrated GSS4T1-based photonic attenuator with an ER > 39 dB and a multi-level switching > 7 bits, thereby forging a pathway for large-scale nonvolatile intensity-modulated PICs.

Integrating novel materials into existing passive and active photonic component libraries, enabling the incorporation of unprecedented devices, is crucial for developing next-generation heterogeneous silicon photonic integrated circuits. In this study, we presented a “Zero change” platform for monolithic back-end-of-line integration of phase change materials in silicon photonics. Narrow SiO₂ trenches were successfully etched down to the top surface of the Si waveguide core with a SiN etching stop layer on it, enabling the post-deposition of various PCMs for large-scale nonvolatile photonic devices integration without any impact on the foundry-verified photonic devices. The insertion loss of the customized trench is lower than 0.09 dB, allowing large-scale integration in photonic networks.

Two kinds of chalcogenide phase change materials (PCMs), Sb₂Se₃ and Ge₂Sb₂Se₄Te_1, with completely different nonvolatile modulation capabilities, were monolithically back-end-of-line integrated into silicon photonics. Nonvolatile post-trimming achieved by post-integrated Sb₂Se₃ was demonstrated. By electrically fine-tuning the trimming unit to achieve the balance of push and pull voltage, the peak power consumption of a push-pull MZI-type switch was reduced by 48%. The nonvolatile reconfigurable post-fabrication trimming could be applied to various photonic chips against fabrication error. Next, both nonvolatile phase modulation based on Sb₂Se₃ and nonvolatile intensity modulation based on Ge₂Sb₂Se₄Te₁ employing back-end integration were demonstrated for large-scale nonvolatile programmable photonic networks. The Sb₂Se₃-integrated micro-ring switch achieved > 5-bit multi-level switching, exhibiting the potential of quasi-continuous switching with electric-pulse-width modulation. Meanwhile, the Ge₂Sb₂Se₄Te₁-integrated-waveguide-based broadband attenuator achieved a maximum extinction ratio > 39 dB with > 7-bit multi-level modulation. The post-fabricated intensity modulator endured 1500 stable switching cycles without obvious performance degradation.

To our best knowledge, we demonstrate, for the first time, the monolithic back-end-of-line integration of PCMs with chips based on commercial foundry process flow offered by 200-mm commercial silicon photonic foundry and thus the electrically programmable multi-level switching nonvolatile photonic devices. This showcases the feasibility of large-scale-fabricated programmable PCM-based nonvolatile photonic chips, which hold significant potential for low-power, large-scale applications in optical computing, microwave photonics, and optical communication networks. And the “Zero change” monolithically back-end-of-line integration platform could also pave the way to integrate other excellent optoelectronic materials into the future silicon photonic process design kits.

Device characterization

The broadband tunable laser (Santec TSL-550) emits a signal light that is directed to the polarization controller (PC) for adjusting polarization, and subsequently couples with the device under test (DUT) through the double-end grating coupler. The output optical power of the DUT is measured by an optical power meter ( MPM-210 ). The electric pulse is generated by an arbitrary waveform generator ( SDG7052A ) and applied to the electrode of the DUT through a radio frequency probe.

Data Availability

All the data supporting this study are available in the paper and Supplementary Information. Additional data related to this paper are available from the corresponding authors upon request.

Acknowledgments

This work was supported by the National Natural Science Foundation of China (91950204，62105287，61975179，92150302), the National Key Research, Development Program of China (2021YFB2801300，2019YFB2203002), and the Zhejiang Provincial Natural Science Foundation of China (LD22F040002). The authors would like to acknowledge the fabrication support from the Institute of Microelectronics of the Chinese Academy of Sciences, ZJU Micro-Nano Fabrication Center at Zhejiang University, and Westlake Center for Micro/Nano Fabrication at Westlake University. The authors would also like to thank Liming Shan for his help in chalcogenide thin-film depositions and Mengxue Qi for her help in device fabrication.

Author contributions

H.L. conceived the idea. M.W., K.X., and B.T. carried out fabrication, measurement setup construction, and device testing. J.L. contributed to the fabrication. Y.Y. assisted in device testing. P. Z. performed passive device characterization. Y.W. performed the protective layer deposition. K.B. assisted in the wafer dicing. K.L. developed the PCMs films. Z.C. developed and deposited the PCMs film. H.M. assisted with measurement setup construction. C.S. contributed to the passive devices design. R.L. contributed to the tape-out of GDS files. H.L., L.L., J.L., M.L. supervised the research. All authors contributed to technical discussions and writing the paper.

Competing interests

The authors declare no competing financial interests.

Sun, C. et al. Single-chip microprocessor that communicates directly using light. Nature 528, 534–538 (2015). https://doi.org:10.1038/nature16454
Marpaung, D., Yao, J. P. & Capmany, J. Integrated microwave photonics. Nat. Photonics 13, 80–90 (2019). https://doi.org:10.1038/s41566-018-0310-5
Pai, S. et al. Experimentally realized in situ backpropagation for deep learning in photonic neural networks. Science 380, 398–404 (2023). https://doi.org:10.1126/science.ade8450
Chi, Y. et al. A programmable qudit-based quantum processor. Nat. Commun. 13, 1166 (2022). https://doi.org:10.1038/s41467-022-28767-x
Bogaerts, W. et al. Programmable photonic circuits. Nature 586, 207–216 (2020). https://doi.org:10.1038/s41586-020-2764-0
Sun, J. et al. A 128 Gb/s PAM4 Silicon Microring Modulator With Integrated Thermo-Optic Resonance Tuning. J. Lightwave Technol. 37, 110–115 (2019). https://doi.org:10.1109/JLT.2018.2878327
Parra, J., Olivares, I., Brimont, A. & Sanchis, P. Toward Nonvolatile Switching in Silicon Photonic Devices. Laser Photonics Rev. 15, 2000501 (2021). https://doi.org:10.1002/lpor.202000501
Melikyan, A. et al. High-speed plasmonic phase modulators. Nat. Photonics 8, 229–233 (2014). https://doi.org:10.1038/nphoton.2014.9
Wong, H. M. K. et al. Broadband, Integrated, Micron-Scale, All-Optical Si3N4/VO2 Modulators with pJ Switching Energy. ACS Photonics 6, 2734–2740 (2019). https://doi.org:10.1021/acsphotonics.9b00708
Datta, I. et al. Low-loss composite photonic platform based on 2D semiconductor monolayers. Nat. Photonics 14, 256–262 (2020). https://doi.org:10.1038/s41566-020-0590-4
Barrios, C. A. & Lipson, M. Silicon photonic read-only memory. J. Lightwave Technol. 24, 2898–2905 (2006). https://doi.org:10.1109/JLT.2006.875964
Grajower, M., Mazurski, N., Shappir, J. & Levy, U. Non-Volatile Silicon Photonics Using Nanoscale Flash Memory Technology. Laser Photonics Rev. 12, 1700190 (2018). https://doi.org:10.1002/lpor.201700190
Geler-Kremer, J. et al. A ferroelectric multilevel non-volatile photonic phase shifter. Nat. Photonics 16, 491–497 (2022). https://doi.org:10.1038/s41566-022-01003-0
Fang, Z. et al. Ultra-low-energy programmable non-volatile silicon photonics based on phase-change materials with graphene heaters. Nat. Nanotechnol. 17, 842–848 (2022). https://doi.org:10.1038/s41565-022-01153-w
Youngblood, N., Ríos Ocampo, C. A., Pernice, W. H. P. & Bhaskaran, H. Integrated optical memristors. Nat. Photonics 17, 561–572 (2023). https://doi.org:10.1038/s41566-023-01217-w
Siew, S. Y. et al. Review of Silicon Photonics Technology and Platform Development. J. Lightwave Technol. 39, 4374–4389 (2021). https://doi.org:10.1109/JLT.2021.3066203
Wuttig, M. & Yamada, N. Phase-change materials for rewriteable data storage. Nat. Mater. 6, 824–832 (2007). https://doi.org:10.1038/nmat2009
Dong, W. et al. Wide Bandgap Phase Change Material Tuned Visible Photonics. Adv. Funct. Mater. 29, 1806181 (2018). https://doi.org:10.1002/adfm.201806181
Zhang, Y. et al. Broadband transparent optical phase change materials for high-performance nonvolatile photonics. Nat. Commun. 10, 4279 (2019). https://doi.org:10.1038/s41467-019-12196-4
Delaney, M., Zeimpekis, I., Lawson, D., Hewak, D. W. & Muskens, O. L. A New Family of Ultralow Loss Reversible Phase-Change Materials for Photonic Integrated Circuits: Sb₂S₃ and Sb₂Se₃. Adv. Funct. Mater. 30, 2002447 (2020). https://doi.org:10.1002/adfm.202002447
Cheng, Z., Ríos, C., Pernice, W. H. P., Wright, C. D. & Bhaskaran, H. On-chip photonic synapse. Sci. Adv. 3, e1700160 (2017). https://doi.org:10.1126/sciadv.1700160
Ríos, C. et al. In-memory computing on a photonic platform. Sci. Adv. 5, eaau5759 (2019). https://doi.org:10.1126/sciadv.aau5759
Zheng, J. et al. Nonvolatile Electrically Reconfigurable Integrated Photonic Switch Enabled by a Silicon PIN Diode Heater. Adv. Mater. 32, 2001218 (2020). https://doi.org:https://doi.org/10.1002/adma.202001218
Aggarwal, S. et al. Antimony as a Programmable Element in Integrated Nanophotonics. Nano Lett. 22, 3532–3538 (2022). https://doi.org:10.1021/acs.nanolett.1c04286
Li, W. et al. Ultracompact High-Extinction-Ratio Nonvolatile On-Chip Switches Based on Structured Phase Change Materials. Laser Photonics Rev. 16, 2100717 (2022). https://doi.org:10.1002/lpor.202100717
Wu, D. et al. Resonant multilevel optical switching with phase change material GST. Nanophotonics 11, 3437–3446 (2022). https://doi.org:10.1515/nanoph-2022-0276
Zhang, C. et al. Nonvolatile Multilevel Switching of Silicon Photonic Devices with In2O3/GST Segmented Structures. Adv. Opt. Mater. 11, 2202748 (2023). https://doi.org:10.1002/adom.202202748
Zhou, W. et al. In-memory photonic dot-product engine with electrically programmable weight banks. Nat. Commun. 14, 2887 (2023). https://doi.org:10.1038/s41467-023-38473-x
Meng, J. et al. Electrical programmable multilevel nonvolatile photonic random-access memory. Light Sci. Appl. 12, 189 (2023). https://doi.org:10.1038/s41377-023-01213-3
Ríos, C. et al. Ultra-compact nonvolatile phase shifter based on electrically reprogrammable transparent phase change materials. PhotoniX 3, 26 (2022). https://doi.org:10.1186/s43074-022-00070-4
Yang, X. et al. Non-Volatile Optical Switch Element Enabled by Low-Loss Phase Change Material. Adv. Funct. Mater. 39, 2304601 (2023). https://doi.org:10.1002/adfm.202304601
Chen, R. et al. Non-volatile electrically programmable integrated photonics with a 5-bit operation. Nat. Commun. 14, 3465 (2023). https://doi.org:10.1038/s41467-023-39180-3
Wei, M. et al. Electrically programmable phase-change photonic memory for optical neural networks with nanoseconds in situ training capability. Adv. Photonics 5, 046004 (2023). https://doi.org:10.1117/1.AP.5.4.046004
Wu, C. et al. Low-Loss Integrated Photonic Switch Using Subwavelength Patterned Phase Change Material. ACS Photonics 6, 87–92 (2019). https://doi.org:10.1021/acsphotonics.8b01516
Chen, R. et al. Broadband Nonvolatile Electrically Controlled Programmable Units in Silicon Photonics. ACS Photonics 9, 2142–2150 (2022). https://doi.org:10.1021/acsphotonics.2c00452
Feldmann, J. et al. Integrated 256 Cell Photonic Phase-Change Memory With 512-Bit Capacity. IEEE J. Sel. Top. Quantum Electron. 26, 1–7 (2020). https://doi.org:10.1109/jstqe.2019.2956871
Feldmann, J. et al. Calculating with light using a chip-scale all-optical abacus. Nat. Commun. 8, 1256 (2017). https://doi.org:10.1038/s41467-017-01506-3
Feldmann, J. et al. Parallel convolutional processing using an integrated photonic tensor core. Nature 589, 52–58 (2021). https://doi.org:10.1038/s41586-020-03070-1
Wu, C. et al. Programmable phase-change metasurfaces on waveguides for multimode photonic convolutional neural network. Nat. Commun. 12, 96 (2021). https://doi.org:10.1038/s41467-020-20365-z
Rahim, A. et al. Taking silicon photonics modulators to a higher performance level: state-of-the-art and a review of new technologies. Adv. Photonics 3, 024003 (2021). https://doi.org:10.1117/1.AP.3.2.024003
Mehta, A. et al. in 17th IEEE International Conference on Micro Electro Mechanical Systems. Maastricht MEMS 2004 Technical Digest. 721–724.
Bachman, D. et al. Postfabrication Phase Error Correction of Silicon Photonic Circuits by Single Femtosecond Laser Pulses. J. Lightwave Technol. 35, 588–595 (2017). https://doi.org:10.1109/JLT.2016.2633317
Chen, X. et al. Post-fabrication phase trimming of Mach-Zehnder interferometers by laser annealing of germanium implanted waveguides. Photonics Res. 5, 578–582 (2017). https://doi.org:10.1364/PRJ.5.000578
Jayatilleka, H. et al. Post-Fabrication Trimming of Silicon Photonic Ring Resonators at Wafer-Scale. J. Lightwave Technol. 39, 5083–5088 (2021). https://doi.org:10.1109/JLT.2021.3079801
Perez-Lopez, D., Lopez, A., DasMahapatra, P. & Capmany, J. Multipurpose self-configuration of programmable photonic circuits. Nat. Commun. 11, 6359 (2020). https://doi.org:10.1038/s41467-020-19608-w
Qiang, X. et al. Large-scale silicon quantum photonics implementing arbitrary two-qubit processing. Nat. Photonics 12, 534–539 (2018). https://doi.org:10.1038/s41566-018-0236-y
Shen, Y. et al. Deep learning with coherent nanophotonic circuits. Nat. Photonics 11, 441–446 (2017). https://doi.org:10.1038/nphoton.2017.93
Xu, S. et al. Optical coherent dot-product chip for sophisticated deep learning regression. Light Sci. Appl. 10, 221 (2021). https://doi.org:10.1038/s41377-021-00666-8
Thomson, D. et al. Roadmap on silicon photonics. J. Opt. 18, 073003 (2016).
Pérez, D. et al. Multipurpose silicon photonics signal processor core. Nat. Commun. 8, 636 (2017). https://doi.org:10.1038/s41467-017-00714-1

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“Zero change” platform for monolithic back-end-of-line integration of phase change materials in silicon photonics

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Abstract

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Introduction

Results

Back-end-of-line integration of PCMs into commercial silicon photonics platform

Back-end integrated SbSe enabled trimming of push-pull MZI switch

Reconfigurable nonvolatile multi-level low-loss phase modulation

Reconfigurable nonvolatile multi-level intensity modulation

Discussion

Methods

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References

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