Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes to ensure fault-tolerance in quantum circuits. However, it is important to note that T-gates come at a considerable computational cost. Our methodology revolves around a comprehensive study of these comparator circuits from a bottom-up perspective. We delve deep into the intricate details of these circuits, dissecting their underlying components and functions. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We have expressed the proposed circuits in Clifford+T gates to render them fault-tolerant while concurrently minimising the utilisation of T-gates, thereby mitigating the associated computational costs. By strategically reducing the number of T-gates used and improving their efficiency, we not only mitigate computational overhead, but also ensure the robustness of these circuits in the face of errors and environmental disturbances.