A novel superjunction MOSFET (SJ-MOSFET) for ultralow reverse recovery charge (Q RR ) and low switching loss is proposed and investigated. This device features a P-type Schottky diode and a source field-plate. The P-type Schottky diode consists of Schottky contact and P-base, which is reverse series-connected with body P-N junction diode. And the source field-plate is formed by implementing a polysilicon field-plate electrically coupled to the source, which is on the top of N-pillar. During the reverse conduction state, the P-type Schottky diode is reverse biased, which dramatically suppresses minority carriers injecting into the drift region. Simultaneously, electron accumulation layer formed under the source field-plate, which provides a path for the reverse current. Consequently, compared with the conventional SJ-MOSFET (Conv-SJ-MOSFET), the proposed SJ-MOSFET achieves an 84.0% lower Q RR with almost no sacrifice in other characteristics. Moreover, the proposed device also exhibits 47.4% and 66.0% lower gate charge (Q G ) and gate to drain charge (Q GD ), respectively. The significantly reduced Q G , Q GD , and Q RR contribute to an overall improvement in switching losses and resultant over 54.8% decrease in total power losses with operation frequency higher than 50 kHz, demonstrating great potential of the proposed SJ-MOSFET used in power conversion systems.

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Posted 30 Mar, 2021
Posted 30 Mar, 2021
A novel superjunction MOSFET (SJ-MOSFET) for ultralow reverse recovery charge (Q RR ) and low switching loss is proposed and investigated. This device features a P-type Schottky diode and a source field-plate. The P-type Schottky diode consists of Schottky contact and P-base, which is reverse series-connected with body P-N junction diode. And the source field-plate is formed by implementing a polysilicon field-plate electrically coupled to the source, which is on the top of N-pillar. During the reverse conduction state, the P-type Schottky diode is reverse biased, which dramatically suppresses minority carriers injecting into the drift region. Simultaneously, electron accumulation layer formed under the source field-plate, which provides a path for the reverse current. Consequently, compared with the conventional SJ-MOSFET (Conv-SJ-MOSFET), the proposed SJ-MOSFET achieves an 84.0% lower Q RR with almost no sacrifice in other characteristics. Moreover, the proposed device also exhibits 47.4% and 66.0% lower gate charge (Q G ) and gate to drain charge (Q GD ), respectively. The significantly reduced Q G , Q GD , and Q RR contribute to an overall improvement in switching losses and resultant over 54.8% decrease in total power losses with operation frequency higher than 50 kHz, demonstrating great potential of the proposed SJ-MOSFET used in power conversion systems.

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13
The full text of this article is available to read as a PDF.
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