Numerical simulation of Gate shape effect on Self-Heating in nano-MOSFET Transistors with high-k dielectric


 The aim of the present work is to investigate numerically the self-heating effect (SHE) in MOSFET transistors based on high-k material taking into account the deformation of the gate under the SHE. The SHE inside the MOSFET transistor is calculated using the electrothermal model based on heat transfer equation coupled with semiconductor equations. The electrothermal model have been solved in 2D-dimension using the finite element method. The high-k dielectric HfO2 have been used as gate oxide. Several gate shapes have been used to analyze their impact on SHE. It is observed that the reduction of equivalent oxide thickness (EOT) reduces the SHE in the MOSFET transistor based in high-k dielectric material. the temperature peak increases quadratically with drain voltage for all MOSFET structures. A decrease in self-heating effect is achieved using the square gate shape.

fact of using a high-k material able to reduce the device temperature and then to mitigate the SHE.
Otherwise, we have investigated the effect of different high-k materials such as ZrO2, HfO2, La2O3, and Al2O3 on SHE in PiFETs Structures [10]. An important reduction of SHE was obtained using these dielectric materials. Some other studies have demonstrated a decrease of gate tunneling current is obtained by using the high-k dielectric materials [11]. According to Yu et al. [12], a good enhancement in transfer and output characteristics is achieved in their experimental study of strained SiGe quantum well p-MOSFETs with higher-k dielectric. Evenly, Sharma et al. [13] have shown that the use of high k materials in JL-CSG MOSFET device contributes to the improvement of the electrical and thermal characteristics.
Pravin et al. [14] have studied the dual metal gate MOSFET transistor with with different h-k dielectric materials. The impact of high-k gate dielectric on electrical characteristics have been simulated in Karbalaei et al. [15] work. They have investigated the electric performance with varying angle of coverage in a circular cross-section of gate-all-around field-effect transistor (GAAFET). The simulation results revealed that the electrical control of the gate over the channel increase as HfO2 cover more the channel. In order to study the self-heating effect (SHE) in nano electronic components, several electrothermal models have been developed and used [5,6,9,[16][17][18]. Belkhiria et al. [16] have analyzed the SHE in the gate-all-around-Field-Effect Transistor (GAAFET) using on the Cattaneo and Vernotte (CV) heat conduction model. Echouchene et al. [5,6] have investigated the entropy generation in MOSFET transistor using the dual-phase-lag (DPL) model. They have shown that the entropy generation cannot be described using the classical form of the equilibrium entropy production and an oscillatory behavior in transient entropy generation obtained using DPL model in a real MOSFET transistor.
In the other hand, the effect of gate shape on electrical and self-heating characteristics in nanowire transistor have been investigate by [19,20].
In this paper we propose to study the gate shape effect on self-heating in MOSFET transistors based on HfO2 as high-k gate dielectric instead of SiO2. Several gate shapes have been used in this analysis such as curve, square and triangular gate shape. The results have been compared to conventional MOSFET structure with plane gate shape. In this investigation, the continuity and  Figure 1 presents the geometry of typical transistor studied in this work. The thin layer of SiO2 insulator is placed above the channel and another layer of high-k dielectric located between the dioxide and the gate.
The high-k gate oxides are physically thicker layers than SiO2.This will retain the same capacity but decreases the tunnel current. Therefore, it is appropriate to define the equivalent oxide thickness (EOT) which is defined the SiO2 layer thickness that would be required to achieve the same capacitance density as the high-k material: where 3.9 is the dielectric constant of the oxide, . is the dielectric constant for high-k material, and . is its thickness. The geometric parameters are illustrated in Table 1.

Electrothermal model
The electrothermal model used in this work is given by [10]: where V, n, p and TL are respectively, the electrostatic potential, the electron concentration, the hole concentration and the lattice temperature, ND and NA are the ionized donor and acceptor impurity concentrations, respectively. Dn,p present the diffusion coefficients of electron and hole, respectively. λ is the thermal conductivity, C is the specific heat, ε is the local permittivity, q, is the magnitude of the charge on an electron, Rn and Rp are the electron and hole recombination rates, respectively.
is the heat generation rate, where E is the built-in electric field, J is the electric current density in the active zone.

Numerical method
The numerical solution of the transport equation (Eq.2) has been done using a finite element method. The approximation of function Φ = [V, p, n, TL] can be expanded in terms of the shape function as: In order to proceed we introduce a complete finite set of shape functions i φ (x,y): j=1,2,…,N.
The integral form is obtained by multiplying (2) by j φ and integrating over the region Ω occupied by the device. After applying the divergence theorem we find : The left terms of Eq. 4 represent the boundaries conditions make the integrals over Γ vanish.
After developpement, Eq. 4 can be written as: After assembling the elementary matrices, we obtain the global matrix form: where Φ is the vector of unknown nodal transportable quantity, [M] is the damping matrix, is the stiffness matrix, and F is the external flux vector.
The discretization of the ordinary differential equation Eq.8 gives where n is the time index and Δt is time discretisation step.
To carry out the thermal analysis of the proposed structures of MOSFET transistor, we adopted the following strategy for solving this problem: • Poisson and continuity equations are solved iteratively, with a convergence achieved.
• Heat transfer equation is solved with an initial temperature 300 K assumed for the device so as to predict the local temperature.
The numerical code was validate with Rahiman and al. [21] results in a SOI MOSFET structure.

Results and discussion
Gate shape effect's on the electro-thermal behavior have been investigated in MOSFET structure based on high-k material. HfO2 has been chosen as a gate dielectric placed above the dioxide SiO2 with an equivalent oxide thickness (EOT).  The dielectric thickness effect on the SHE in MOSFET structure is studied for different EOT and for a variable drain voltage as shown in figure 5 at fixed VG=1.2 V. The simulation results suggest that the highest temperature is obtained with the high value of VD and the low of EOT. However, the peak temperature value proves that at this point the tunneling probability of the carrier to the gate terminal through the oxide is maximum. Therefore, we should choose the low EOT value in order to significantly reducing the impact ionization.
Subsequently, we propose to study the gate shape effect three different gate shape as shown in figure 1 (b-d) are chosen in order to analyze the SHE in these structures. Figure 6 shows the maximum temperature variation with the drain voltage for a constant VG=1.2 V. This study exhibits a quadratic temperature increase with the drain voltage VD. It is clear from this figure that the gate shape affects the temperature variation. The lowest temperature is achieved with square gate shape.  The temperature profile along the x direction is presented in figure 8 at the Si-SiO2 interface. It is clear from this figure that the SHE is located in the drain side channel for all structures. Also, the hot spot is located near the drain region and the maximum temperature reaches up to 325 K using the triangular gate shape. The results obtained with the S-MOSFET are slightly higher than T-MOSFET and C-MOSFET. It is found that the use of square gate shape can endure the increase of the temperature in nanodevices.
The transient temperature profile in normal MOSFET is shown in figure 9 for different drain voltage. The results show the maximum temperature, which is located near the drain region at the Si/SiO2 interface for VG=1.2 V. The temperature profile increases rapidly for t < 100 ps and slightly for t > 100 ps until the steady state is reached at t= 500 ps for different VD. The same study has  It is clear from this figure that the steady state in T-MOSFET structure is achieved earlier than the other structures. However, a significant temperature rise is obtained using the BTE and BDE models and the temperature achieve so fast the steady state.

Conclusion
On this work, the self-heating effect is analyzed in MOSFET transistor with different gate shapes.
The heat transfer equation and the semiconductor equations have been used to investigate the temperature distribution along devices. The effect of drain voltage and EOT have been discussed.
In addition, the special and temporal evolution have been analyzed. The obtained results show that using different gate shape able to mitigate the SHE. Especially, the square gate shape is more appropriate to reduce the temperature device.

Conflicts of interest/Competing interests: No conflict of interest
Availability of data and material (data transparency): All data related to this publication are made available in the article.              Channel doping concentration 1x10 17 cm -3