Variability analysis of a graded-channel dual-material double-gate strained-silicon MOSFET with fixed charges

In this paper, variability analysis of a graded-channel dual-material (GCDM) double-gate (DG) strained-silicon (s-Si) MOSFET with fixed charges is analyzed using Sentaurus TCAD. By varying the different device parameters, the variability of the proposed GCDM-DG s-Si MOSFET is analyzed with respect to variations in threshold voltage, drain current, and short-channel effects as the line edge roughness and fluctuations in random dopant, contact resistance, and oxide thickness are considered. The results confirm that the effect of process variations is severe when the device has fixed charges at the oxide interface. Moreover, the proposed GCDM-DG s-Si p-MOSFET is less vulnerable to the effects of line edge roughness, fluctuations in oxide thickness, and random dopants in comparison with the proposed GCDM-DG s-Si n-MOSFET. Also, the proposed GCDM-DG s-Si MOSFET is more reliable when compared to the GC-DG s-Si MOSFET from the different variability sources.


Introduction
In recent times, numerous studies have been dedicated to strained-silicon (s-Si) MOSFETs owing to their compatibility with traditional silicon fabrication processing and the capability for obtaining higher performance because of the enhanced carrier transport properties, i.e., improved mobility and high-field velocity [1][2][3][4][5][6]. Using the layer transfer method [7], strain is introduced into the silicon material. In this technique, the biaxial-tensile strain is developed in the silicon layer by growing a silicon layer on the relaxed Si (1−X) Ge (X) layer, which is developed for silicon-on-insulator (SOI) material. In nanoscale MOSFETs, interface charges are generated at the s-Si/oxide ( s-Si/SiO 2 ) interface due to the electric field in s-Si devices [8][9][10]. Hence, the performance of the s-Si MOSFET deteriorates in terms of threshold voltage and short-channel effects (SCEs), such as threshold voltage roll-off, drain-induced barrier lowering, subthreshold swing, and channel length modulation [11][12][13]. Moreover, downscaling of devices in the nanoscale regime becomes a major technological problem due to the intrinsic random variations and systematic process fluctuations in the device. The systematic sources are process-induced contact resistance fluctuations (CRF), oxide thickness fluctuations (OTF), and line edge roughness (LER). The random variability sources include random dopant fluctuations (RDF). The characteristic variability challenges highlight the need for technological management of systematic variability and variability-aware designs in technology modeling frameworks [14][15][16].
To reduce the hot-carrier effects (HCEs), dual-metal gate (DMG) engineering is incorporated into a double-gate (DG) s-Si MOSFET [17][18][19]. Since the control gate in the DMG structure has a higher work function than the screen gate, a step-like profile in channel potential and an increased average electric field in the channel are achieved. Consequently, the performance of the DG s-Si device is enhanced by incorporating the DMG structure. Furthermore, when graded-channel (GC) engineering is included in the DG s-Si MOSFET, a lower electric field is obtained at the drain side, thus resulting in reduced HCEs [20][21][22]. Therefore, better performance of the DG s-Si MOSFET is acquired by employing both gate and channel engineering.
The analytical threshold voltage model of a fully depleted SOI (FD-SOI) MOSFET with random dopant fluctuations was demonstrated in [23]. Moreover, The dependence of different device parameters, such as channel length, thicknesses of gate oxide and silicon film on the deviation in threshold voltage was studied. In [24], the effect of random dopant fluctuation in an undoped channel silicon gate-all-around nanowire was demonstrated. In addition, it was observed that the random dopant fluctuation in the source/drain extension and channel regions disturbs the carrier potential and initiates random variations in the electrical characteristics of the nanowire. In [25], the impact of random dopant variation in the source and drain on the performance of DG MOS-FETs was presented. Also, the effect of high doping clusters on the charge injection has been examined in detail using quantum simulation based on the non-equilibrium Green function coupled self-consistently to Poisson's equation. In [26], a study on the impact of random dopant variations of the source/drain extension (SDE) of strained SiGe FinFETs was presented. Increasing the SDE length and decreasing the SDE doping concentration reduces the variations in threshold voltage, ON current, and OFF current. Variability analysis of a graded-channel dual-material (GCDM) DG s-Si MOSFET with fixed charges has not been presented so far in the literature. By employing a GC with gate engineering structure, reduced variability in the performance of the s-Si DG MOSFET is achieved.
This paper illustrates the analysis of the effects of RDF, OTF, CRF, and LER on the performance of a GCDM-DG s-Si device with fixed charges. The electrical characteristics of the device strongly depend on doping profiles and the physical dimensions, so the responsiveness of the device to the deviations of RDF and LER is increased. Thus, we must calculate the standard deviations of the threshold voltage and ON current of the device due to the perturbations of RDF, LER, OTF, and CRF. Also, the variations in the characteristics of the MOSFET can be reduced by carefully choosing the device's dimensions. In addition, the proposed GCDM-DG s-Si p-MOSFET has lower deviations when compared to the proposed GCDM-DG s-Si n-MOSFET.

Proposed MOSFET structure and TCAD setup
The simulated schematic view of the GCDM-DG s-Si MOS-FET with fixed charges is shown in Fig. 1a. The channel region is doped with four different uniform doping concentrations ( N a1 , N a2 , N a3 , and N a4 ). The top and bottom gates of the proposed device consist of a control gate and a screen gate. The work functions towards the source-and drain-side metal gates are considered at 4.8 eV and 4.6 eV (i.e., m1 > m2 ), respectively, for both the proposed n-MOSFET and p-MOSFET. However, the gates of the GC-DG s-Si MOS-FET have a single gate material whose work function is an average of m1 and m2 . Owing to HCEs in the nanoscale proposed s-Si MOSFET, fixed charges are created at the oxide/channel interface in the damaged region of length L d , as shown in Fig. 1a. The transfer characteristics of the s-Si MOSFET simulated in TCAD are calibrated with the experimental results of the transfer characteristics of [27], as demonstrated in Fig. 1b. It is apparent from Fig. 1b that the TCAD simulation data of the s-Si device is in good agreement with the experimental data illustrated in [27] [27] different device parameters and dimensions of the proposed MOSFET used in the simulation are listed in Table 1.
Because of the strain introduced into the silicon layer, the energy band structure of silicon is affected because of the biaxial tension. Hence, the energy band gap of the silicon material and effective mass of carriers decrease, whereas the electron affinity of an atom ( Si ) increases. The variations in energy band gap of silicon, electron affinity of atoms, and effective mass of carrier are expressed as shown below [28,29] where X represents the germanium mole fraction in the silicon layer and V T indicates thermal voltage. N V,Si and N V,s−Si demonstrate the density of states in the valence band of silicon and the strained-silicon material, respectively. m * h,Si and m * h,s−Si denote the effective mass of the holes in the silicon and strained-silicon material, respectively. It is obvious from the equations given below that the flat-band potential and barrier potential of the source (drain)-to-channel decrease simultaneously [30].
where ΔV fb and ΔV bi are the variations in flat-band voltage and built-in barrier, respectively.
The variability analysis of the proposed GCDM-DG s-Si device with fixed charges is simulated using the statistical impedance field method (sIFM) in the Sentaurus TCAD [31]. The sIFM creates a considerable number of randomized fluctuations of the parameters that are under investigation (dopant concentrations) and evaluates the changes in the device performance in linear response. In device simulation, the following physical models are employed. The carrier transport mechanism is evaluated using the drift diffusion model, and carrier recombination is estimated using Auger and SRH recombination models. The carrier mobility is interpreted using the high-field saturation and Enormal mobility model. Energy band gap narrowing effects are estimated by the OldSlotboom model, and strained-silicon properties by the MoleFraction model. The effect of the fixed charges at the oxide/channel interface of the MOSFET are assessed using the Traps model, and quantum mechanical effects are also considered using the density gradient model [32].

Results analysis
This section presents the variability analysis of the GCDM-DG s-Si MOSFET with fixed charges. The effects of RDF, OTF, CRF, and LER are considered individually to perform variability analysis of the proposed device, and each case is simulated with an ensemble size of 100. Figure 2 depicts the effects of RDF, OTF, CRF, and LER on the threshold voltage, ON current, and drain-induced barrier lowering (DIBL) effects of the GCDM-DG s-Si n-MOSFET at L = 20 nm , t ox = 1 nm , and m = 0.2 . It is evident from Fig. 2 that the CRF has a greater effect on ON current ( I ON ) and LER has a moderate effect on threshold voltage ( V th ) of the device with V ds = 0.05 V when compared to other variations, as listed in Table 2. In addition, the effects of LER on threshold voltage and the CRF on drain current are lower at V ds = 0.9 V when compared to those effects at V ds = 0.05 V . Also, LER and RDF have a moderate impact on DIBL compared to other variability sources. The standard deviation of V th ( V th ) of the proposed device is estimated for different values of V th and extracted from the transfer characteristics using Channel thickness t s−Si 10 nm 5 Oxide thickness t ox 1-2 nm 6 Work functions of control and screen gates Germanium mole fraction m 0.2-0. 3 10 Fixed charge density N f − 4 × 10 12 , 4 × 10 12 cm −2 1 3 the constant current method (i.e., I d = ( W L )10 −7 A∕μm) . Therefore, standard deviations of I ON ( I ON ) and V th are calculated with respect to the reference transfer characteristic curve ( V th = 0.327 V and I ON = 7.3 × 10 −4 ), as seen in Table 2. Figure 3 shows the effects of RDF, OTF, CRF, and LER on the threshold voltage, ON current, and DIBL of the GC-DG s-Si n-MOSFET at L = 20 nm , t ox = 1 nm , and m = 0.2 . It is observed from Fig. 3 that the CRF has a greater effect on I ON and LER has moderate effect on V th of the MOSFET when compared to other variations, as listed in Table 2. In addition, the effect of LER on V th is greater at V ds = 0.9 V than at V ds = 0.05 V . Also, the LER has a severe impact on DIBL of the GC-DG s-Si n-MOSFET compared to other variability sources. It is observed from Tables 2 and 4 that the proposed GC-DMDG s-Si n-MOSFET is more reliable at V ds = 0.9 V compared to the GC-DG s-Si n-MOSFET, since the DMG structure of the proposed GC-DMDG s-Si n-MOSFET is responsible for lower fluctuations with respect to different variability sources, and vice versa for V ds = 0.05 V . In this case, I ON and V th are calculated with respect to the reference transfer characteristic curve ( V th = 0.308 V and I ON = 7.38 × 10 −4 ), as seen in Table 2.
The effects of RDF, OTF, CRF, and LER on the threshold voltage, ON current, and DIBL of the GCDM-DG s-Si  Fig. 4. It is observed from Figs. 2 and 4 that the variation effects are lower at a channel length of 40 nm as compared to a channel length of 20 nm due to reduced short-channel effects. Also, the LER and RDF have minimal impact on DIBL compared to other variability sources. However, CRF has a considerable effect on I ON and LER has a moderate effect on the threshold voltage of the device compared to other process variations, as listed in Table 2. In this case, I ON and V th are calculated with respect to reference transfer characteristic curve ( V th = 0.399 V and I ON = 4.21 × 10 −4 ), as illustrated in Table 2.  Table 3. Also, the LER has a moderate effect on DIBL compared to other variability sources. In addition, the DIBL effect is severe for the proposed p-MOSFET when compared to the GC-DG s-Si p-MOSFET because the position of minimum channel potential lies towards the drain side than source side. I ON and V th are calculated with respect to reference transfer characteristic curve ( V th = −0.415 V and I ON = 3.19 × 10 −4 ), as demonstrated in Table 3. It is observed from Tables 2 and 3 that the effects of RDF, OTF, CRF, and LER on I ON and V th of the proposed p-MOSFET are less than the proposed n-MOSFET because of the higher threshold voltage of the proposed p-MOSFET.
GC-DG s-Si  Figure 6 demonstrates the effects of RDF, OTF, CRF, and LER on the threshold voltage, ON current, and DIBL of GC-DG s-Si p-MOSFET at L = 20 nm , t ox = 1 nm , and m = 0.2 . It is evident from Fig. 6 that the CRF has a moderate effect on I ON and LER has severe effect on threshold voltage of the device as compared to the other fluctuations, as listed in Table 3. Also, the LER has a moderate effect on DIBL compared to other variability sources. It is noted from Table 3 and Table 5 that the proposed GCDM-DG s-Si p-MOSFET is more reliable at V ds = 0.9 V compared to the GC-DG s-Si n-MOSFET, since the DMG structure of the proposed GCDM-DG s-Si n-MOSFET is responsible for lower fluctuations with respect to different variability sources, and vice versa for V ds = 0.05 V. I ON and V th are calculated with respect to reference transfer characteristic curve ( V th = -0.389 V and I ON = 3.28 × 10 −4 ), as demonstrated in Table 3. It is observed from Table 2 and Table 3 that the effects of RDF, OTF, CRF, and LER on the I ON and V th of the GC-DG s-Si p-MOSFET are lower compared to the GC-DG s-Si n-MOSFET due to the higher threshold voltage of the GC-DG s-Si p-MOSFET.    The effects of RDF, OTF, CRF, and LER on the threshold voltage, ON current, and DIBL of the GCDM-DG s-Si p-MOSFET at L = 40 nm, t ox = 1 nm, and m = 0.2 are shown in Fig. 7. It is observed from Figs. 5 and 7 that the variation effects are lower for channel length L = 40 nm as compared to L = 20 nm due to reduced short-channel effects. Moreover, the effect of LER has minimal impact on the DIBL compared to other variability sources. However, CRF has less impact on I ON of the proposed device when compared to the other variations, as listed in Table 3. The effect of LER on threshold voltage is less at V ds = 0.05 V than at V ds = 0.9 V. In this case, I ON and V th are calculated with respect to reference transfer characteristic curve ( V th = −0.461 V and I ON = 1.41 × 10 −4 ), as shown in Table 3.
It is evident from Tables 2 and 4 that as strain and t ox increase, the impacts of RDF and LER on the threshold voltage increase slightly due to the decrease in threshold voltage of the proposed n-MOSFET. As N f is considered at the oxide/channel interface, the effects of CRF and LER on I ON and the effects of LER and OTF on V th and DIBL are more severe compared to the other effects. However, in the case of the proposed device with positive N f , the impacts of OTF and LER on both I ON and V th are lower compared to the device that has negative N f at the oxide/channel interface. Because of the fixed charges at the oxide/channel interface, the minimum channel potential and its position in the device vary according to the polarity and magnitude of the fixed charges and length of the damaged region [20]. As negative N f increases, the threshold voltage of the device increases because of the decrease in minimum channel potential, and vice versa for positive N f . In addition, I ON and V th are calculated with respect to the reference transfer characteristic curve, as illustrated in Tables 2 and 4.
It is observed from Table 3 that as t ox decreases, the impacts of RDF and LER on the threshold voltage increase slightly. As N f is considered at the oxide/channel interface, the effects of CRF and LER on I ON and the effects of LER and OTF on V th and DIBL are more severe compared to the other effects. However, in the case of the proposed device with negative N f , the impacts of OTF and LER on both I ON and V th are decreased compared to the device that has positive N f at the oxide/channel interface. As shown in Tables 2 and 3, there is a slight decrease in I ON and V th for RDF, OTF, and LER effects on the p-MOSFET when compared to the n-MOSFET. In addition, I ON and V th are calculated with respect to reference transfer characteristic curves, as illustrated in Table 3.
The impacts of RDF and OTF on the threshold voltage of the device with V ds = 0.9 V are greater when compared to the device with V ds = 0.05 V . However, the effect of LER on the threshold voltage of the device with V ds = 0.9 V is less when compared to the device with V ds = 0.05 V , as illustrated in Tables 2, 3, 4, and 5.
It is observed from Table 6 that the OFF current ( I L = log 10 I OFF ) of the proposed GCDM-DG s-Si n-MOS-FET is lower compared to the GC-DG s-Si MOSFET due to the step-like profile in the channel potential [20]. Moreover, as strain increases in the channel, the impact of RDF on the leakage current and DIBL increases slightly. When N f is considered at the oxide/channel interface, the effect LER on I L , DIBL, and subthreshold swing (SS) is more severe when compared to the other effects. However, in the case of the proposed device with positive N f , the impact of LER on I L , DIBL, and SS is less when compared to the device that has negative N f at the oxide/channel interface. In addition, I L , DIBL, and SS are calculated with respect to reference transfer characteristic curves, as illustrated in Table 6.
It is obvious from Table 7 that as strain increases, the impact of RDF on the SS and DIBL decreases slightly. The I L of the proposed GCDM-DG s-Si p-MOSFET is decreased compared to the GC-DG s-Si p-MOSFET. When N f is considered at the oxide/channel interface, the effect LER on I L , DIBL, and SS is more severe compared to the other effects. However, in the case of the proposed device with negative N f , the impact of LER on I L , DIBL, and SS is less when compared to the device that has positive N f at the oxide/channel interface. In addition, I L , DIBL, and SS are calculated with respect to reference transfer characteristic curves, as illustrated in Table 7.

Conclusion
The variability analysis of the proposed GCDM-DG s-Si MOSFET with fixed charge density has been evaluated using the TCAD tool. The variability of the GCDM-DG s-Si MOSFET is reduced by employing the DMG structure and GC engineering. A detailed variability analysis has been done to investigate the different effects, such as RDF, OTF, CRF, and LER, by varying parameters of the GCDM-DG s-Si MOSFET. Decreases of I ON , I L , V th , DIBL , and SS of the proposed GCDM-DG s-Si MOSFET have been obtained by increasing the channel length. It is concluded from the results that the effects of OTF and LER on the device characteristics are severe when the device has fixed charge density at the oxide/channel interface. Also, it is observed that the proposed GCDM-DG s-Si MOSFET is more reliable from the different variability sources when compared to the GC-DG s-Si MOSFET. In addition, the impacts of RDF, OTF, CRF, and LER on ON current, OFF current, threshold voltage, DIBL, and SS of the proposed GCDM-DG s-Si p-MOSFET is less compared to the proposed GCDM-DG s-Si n-MOSFET.
Author contributions All the authors contributed to study conception and conceptualization. TCAD simulation, analysis, and first draft were performed by Suddapalli Subba Rao and edited by Nistala Bheema Rao.
Funding The authors gratefully acknowledge the simulation facilities provided by the Analog IC lab, NIT Warangal. The authors have no other relevant funding or financial support to disclose in relevance to the work shown in this paper.

Availability of data and materials
The data that support the findings of this study are available from the corresponding author, upon reasonable request.

Conflict of interest
The authors declare that there is no conflict of interest.

Consent to participate Not applicable.
Consent for publication All the authors declare their consent to transfer the publication rights to the journal in which this manuscript is submitted.