Atomic-scale ferroic HfO2-ZrO2 superlattice gate stack for advanced transistors


 With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. This led to the adoption of high-κ dielectric HfO2 in the gate stack in 2008, which remains as the material of choice to date. Here, we report HfO2-ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric-antiferroelectric order, directly integrated onto Si transistors and scaled down to ~ 20 Å, the same gate oxide thickness required for high performance transistors. The overall EOT (equivalent oxide thickness) in metal-oxide-semiconductor capacitors is equivalent to ~ 6.5 Å effective SiO2 thickness, which is, counterintuitively, even smaller than the interfacial SiO2 thickness (8.0-8.5 Å) itself. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-κ dielectric gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. Therefore, our work demonstrates that HfO2-ZrO2 multilayers with competing ferroelectric-antiferroelectric order, stabilized in the 2 nm thickness regime, provides a new path towards advanced gate oxide stacks in electronic devices beyond the conventional HfO2-based high-κ dielectrics.

Mixed-ferroic atomic-scale HfO 2 -ZrO 2 multilayers were designed considering FE-AFE or-108 der can tune the free energy landscape in a similar manner to the FE-DE model systems originally 109 studied for negative capacitance stabilization 11,22 (Fig. 1a). From the free energy landscape pic-110 ture within a Landau formalism (Methods), the competition between the negative curvature (i.e. 111 negative capacitance) of the FE and the positive curvature (i.e. positive capacitance) of the AFE 112 can flatten the overall energy landscape, thereby substantially increasing the system's susceptibil- 113 ity. To confirm the higher susceptibility in the mixed AFE-FE system directly, we have performed 114 capacitance-voltage (C-V) hysteresis loops in metal-insulator-metal (MIM) capacitor structures on 115 thicker films with the same superlattice periodicity (Fig. 2a). Besides features indicative of mixed 116 FE-AFE order, the total capacitance for the superlattice is larger than both conventional AFE ZrO 2 117 and FE Zr:HfO 2 of the same thickness (Fig. 2a), demonstrating enhanced susceptibility. To quan-118 tify the permittivity, capacitance measurements were performed across the superlattice thickness 119 series. These measurements yield an extracted permittivity of ∼ 52 (Fig. 2b, Methods), which is 120 larger than both FE orthorhombic Zr:HfO 2 and AFE tetragonal ZrO 2 values 23 . 121 To further understand the ferroic evolution in these HfO 2 -ZrO 2 superlattices, we performed 122 low temperature measurements where enhanced FE phase stabilization is expected. Indeed, temperature-123 dependent C-V loops for thicker HfO 2 -ZrO 2 multilayers demonstrate an evolution from mixed-124 ferroic to FE-like hysteresis upon cooling slightly below room temperature (∼ 240 K, Fig. 2c), con-125 sistent with temperature-dependent X-ray spectroscopy indicating transition from mixed tetragonal-126 orthorhombic phase to predominately orthorhombic structure at similar temperatures (Extended 127 Data Fig. 3). The capacitance decrease upon cooling as the system moves away from the highly- Next, the superlattices were grown on Si substrates in metal-oxide-semiconductor (MOS) 135 capacitor structures. A self-limiting chemical oxide SiO 2 was grown first, resulting in ∼ 8.0-8.5 136 Å thickness 3 , following the standard practice in advanced Si devices (Methods). Next, a 20-cycle 137 thick multilayer was grown with ALD following the same stacking as before i.e. Hf:Zr:Hf 4:12:4. Hf:Zr composition (Fig. 2e). Notably, the composition in our films is close to where several previ- films is not simply driven by doping 23,35 , but can instead be tuned by the configuration of the 155 multilayer structure (Extended Data Fig. 4 To quantify the observed capacitance, we have performed EOT simulations of MOS capac-162 7 itors using the industry standard model Synopsys simulation platform (Methods). The Hf:Zr:Hf 163 4:12:4 trilayer stacks vary between 6.5-7.0 Å EOT (Fig. 2f), consistent over many measured ca-164 pacitors. Notably, this EOT is smaller than the expected thickness of the interfacial SiO 2 layer 165 (8.0-8.5 Å), as mentioned above. To investigate further, we performed high-resolution TEM of 166 our gate stacks (Extended Data Fig. 6), which illustrates the SiO 2 thickness is indeed ∼8.5 Å. To 167 supplement this physical characterization, we next implemented electrical characterization of the 168 interfacial layer via standard inverse capacitance vs thickness analysis of conventional dielectric 169 HfO 2 and Al 2 O 3 thickness series grown on the same SiO 2 (Methods, Extended Data Fig. 6). All 170 thermal processing is kept exactly the same as the superlattice gate stack. The extracted HfO 2 and 171 Al 2 O 3 permittivity -19 and 9, respectively -is consistent with the typical dielectric phases of these 172 two materials. Therefore, one can reliably extract the SiO 2 layer thickness, yielding 8 Å (Extended 173 Data Fig. 6), consistent with the HR-TEM results and similar to previously studies established 174 by the semiconductor industry 3 . Moreover, the consistent interlayer thickness extracted from both 175 material systems indicates that neither Hf nor Al encroaches into the interfacial SiO 2 which would 176 reduce its thickness and/or increase its permittivity. This is consistent with the fact all our stacks 177 are processed at much lower temperature as compared to that needed for silicate formation 43 . So 178 considering the interfacial layer thickness as 8 Å, the Hf:Zr:Hf 4:12:4 gate stack demonstrates an 179 overall EOT 1.0-1.5 Å lower than the constituent SiO 2 thickness. In other words, capacitance en-180 hancement is observed in this 20 Å mixed ferroic gate oxide integrated on Si. Therefore, the mixed 181 FE-AFE order not only improves the permittivity of the multilayer stack itself, but also couples to 182 the SiO 2 in MOS capacitor structures, yielding improved overall capacitance.

183
The practical implication of this capacitance enhancement can be clearly seen in Fig. 3a, 184 which shows leakage current vs EOT behavior. The leakage current is measured at to the falling of trend for conventional gate stacks due to scavenging in the low EOT range.

207
To examine how the capacitance enhancement behaves at high frequency, radio frequency 208 (RF) measurements were performed on the same long channel (L G = 1 µm) devices (Methods, 209 Extracted Data Fig. 9). This allows one to extract device parameters up to ∼ 800 MHz for our 210 devices (close to the cut-off frequency). Of particular interest is the transconductance (g m ) which 211 is proportional to the product of capacitance and electron velocity (mobility           (Extended Data Fig. 2c,d). Additionally, the evolution between these two ferroic phases are also 405 studied as a function of temperature (Extended Data Fig. 3). mounted on the del-arm was used to collect diffraction signal with a grazing incidence geometry.

572
The region-of-interest on the detector was set such that the ring-like signal was fully integrated. In-573 plane GID was collected by sweeping the in-plane angle ν (8-50°) with a fixed out-of-plane grazing 574 angle δ (δ = 0.9°); the corrected Bragg angle (2θ) over which the data is plotted and indexed is de-575 termined from the relationship cos 2θ = cos ν · cos δ set by the geometry of the diffractometer.

576
The X-ray source was fixed at 16 keV (λ = 0.775 Å). In-plane diffraction yields more diffraction 577 peaks with better defined width, likely due to the preferred orientation and disc-shape domains in  Bragg's law based on the peak position (Extended Data Fig. 2a)

609
The monoclinic phase was ruled out due to a lack of two {111} peaks in the diffraction spec-  Fig. 2a), it is always reported that the tetragonal (101) t reflection has a smaller d-spacing 55 in 613 thicker HfO 2 -based films 28 , and is therefore expected to be present at a higher angle compared to 614 the orthorhombic (111) 0 reflection, which is the case in the indexed diffraction spectra (Extended 615 Data Fig. 2a) based on the self-consistent indexing methodology outlined above provides.

616
In terms of extracting the phase fraction of the tetragonal and orthorhombic phases, while 617 Rietveld refinement has been applied to grazing incidence x-ray diffraction of thick (10 nm)

618
Zr:HfO 2 56 to determine the orthorhombic phase fraction, that methodology cannot be applied in 619 the ultrathin regime, as the films are highly oriented, as opposed to fully polycrystalline (Extended 620 Data Fig. 2b), which is a requirement to apply Rietveld refinement. frequency-independent capacitance is given by where C i and D i refer to the measured capacitance in parallel mode (C p -R p ) and dissipation values where t Hκ is the thickness of the high-κ (Al 2 O 3 or HfO 2 ) layer, t phys SiO 2 is the physical SiO 2 thickness, in a line and the permittivity can be extracted from the slope. This yielded extracted permittivities 688 of 9 and 19 for the Al 2 O 3 and HfO 2 thickness series, respectively, as expected for these systems.

689
Note that for the HfO 2 thickness series, thicknesses of 6 nm and higher were used to ensure HfO 2 690 stabilizes in the dielectric monoclinic phase (κ ∼ 18) 36 .

691
Similarly, the permittivity of the HfO 2 -ZrO 2 heterostructures was extracted from thickness-692 dependent MIM C-V measurements (Fig. 2b). The inverse capacitance is a linear function of the 693 film thickness, and the permittivity can be extracted from the slope.

694
Electrical interlayer thickness extraction The thickness of the SiO 2 interlayer was de-695 termined not only by TEM (Extended Data Fig. 6a), but also electrically via C-V measurements 696 of both dielectric HfO 2 and Al 2 O 3 thickness series on SiO 2 -buffered Si (Extended Data Fig. 6f).
where V f b is the flatband voltage (Extended Data Fig. 6b,d). To confirm this methodology, another to the voltage value for the SiO 2 interlayer and Si charge layer Q-V relation (Extended Data Fig.   707 6c,e). As expected, both methods lead to the same extracted Q-V relation (Extended Data Fig.   708 6c,e), corresponding to 8 Å EOT (Extended Data Fig. 6f) -close to the SiO 2 physical thickness Firstly, the channel resistance is extracted at 50 mV drain-to-source bias (V DS ) by subtracting the 737 parasitic resistance (R p ) from the measured drain-to-source resistance (R DS ).
where R p is ascribed to the resistance of the source and the drain contacts and the n+ extension 739 regions that are extrinsic to the channel region. When the overdrive voltage ( where V t is the threshold voltage) is sufficiently large, R ch is known to be inversely proportional to The large device dimensions minimizes the parasitic capacitance contribution to ensure C gc is 747 representative of the inversion electron responses. Finally, we combine the above characterizations 748 to obtain the effective mobility using Equation 4 (Extended Data Fig. 7f).

749
Transconductance extraction The measured transconductance (g m = ∂I D /∂V GS ) and the 750 output conductance (g ds = ∂I D /∂V DS ) are affected by the series resistance on the source (R S ) and 751 the drain sides (R D ), as they reduce the voltage drops on the channel region, where V GSi and V DSi are the gate-to-source and the drain-to-source voltages intrinsic to the chan-753 nel, respectively. R S ≈ R D ≈ R p /2 because the transistor is symmetric.  Fig. 9a). Therefore, the L g offset as well as the R p can be found at the intersect of the linear rela-761 tions of the R SD − L g with different V ov (Extended Data Fig. 9c). The two R p extraction methods 762 yield consistent results.

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The following equation is solved to extract the intrinsic g mi = ∂I D /∂V GSi and g dsi =

764
∂I D /∂V DSi without the degradation due to R S and R D .
where g m and g ds are measured, and R S ≈ R D ≈ R p /2 from the above discussed characterizations.

766
Using this methodology, the intrinsic g mi and intrinsic g dsi are extracted (Fig. 3f, Extended Data short structure, and then are converted to impedance parameters (Z parameters): Next, to decouple the effect of series pad resistance and inductance of DUT, Z 2 is subtracted from 782 Z 1 and the resulting difference is converted back to admittance parameters, Y corr : Y corr represents the de-embedded admittance parameters of the DUT. This de-embedding proce-784 dure is schematically represented in Extended Data Fig. 8a.

785
To extract the total gate capacitance (C gg ) and transconductance (g m ) from the de-embedded 786 admittance parameters, a small-signal model of the transistor was assumed (Extended Data Fig.   787 8b). Under this small-signal model, the Y -parameters can be written in terms model parameters 788 and frequency (assuming R s = R d = 0, C gg = C gs + C gd , and 4π 2 C 2 gg R 2 g f 2 ≪ 1) 789 Y 11 = 4π 2 C 2 gg R g f 2 + 2πf C gg j (13) The transconductance (g m ) can therefore be extracted at a fixed DC bias via the following relation 790 (Fig. 3c, Extended Data Fig. 9c).  Data Fig. 10c). From the integration of the measured discharging current, a charge vs voltage 799 relationship was extracted (Extended Data Fig. 10d). The voltage was calculated by max(V −IR), 800 where V is the applied voltage pulse, I is the measured current, and R is a combination of the where t is the thickness of the HfO 2 -ZrO 2 heterostructure. The Q-V relation of the series ca- Landau phenomenology of antiferroelectric-ferroelectric system The qualitative en-817 ergy landscape for a mixed ferroelectric-antiferroelectric material (Fig. 1a) For the antiferroelectric layer, the energy landscape assumes two sublattices (P a , P b ) with sponta-822 neous, antiparallel dipoles. In order to express the AFE energy landscape in terms of total polar-823 ization, a change of variables was performed (P = P a + P b , A = P a − P b ). The antiferroelectric 824 profile therefore becomes, The system is also constrained by electrical boundary conditions at the antiferroelectric/ferroelectric 826 interface (ǫ 0 E AF E + P AF E = ǫ 0 E F E + P F E ) and that the voltage across both layers must sum up With these constraints, the combined energy profile is given In order to further simplify this expression, we note that the last term represents the electrostatic 830 energy arising from polarization mismatch at the AFE-FE interface. In general, such mismatch 831 is quite costly, resulting in nearly uniform polarization across all layers. Therefore, we apply 832 the approximation (P AF E = P F E = P ), which sets the last term to 0. Furthermore, in order to 833 express U as just a function of P , we can generate another constraint by noting that in equilibrium,