Performance analysis of optical AND gate using T-shaped waveguide

- Ultra-compact all-optical AND logic gate is realized for optical processing and photonic integrated devices with two-dimensional photonic crystal waveguides based on beam interference principle. The performance of the structure is examined and evaluated by optimized parameters such as refractive index and silicon rod radius. The results obtained from a numerical calculation using the finite-difference time-domain (FDTD) method and plane wave expansion method. The photonic crystal based all-optical AND logic gate has benefits of compact size as 38.88 µ 𝑚 2 , operated at low power levels, high transmission ratio and good time response as 0.124 ps. Associated with conventional semiconductor optical amplifiers, Mach-Zehnder interferometer and photonic crystal ring resonators proposed methodology provides better performance with a high achieved more than 97% transmission ratio, at a wavelength of 1.55 µm.


INTRODUCTION
Photonic crystals (PhCs) have a periodic micro or nanostructures in optical nature, which have a photonic bandgap (PBG) similar way of energy bandgap in conventional electronic devices to control and confinement of light flow [1]. The PhCs have properties such as low power dissipation, smaller in size and operates at a low power level. These assistances of PhCs can be achieved by creating the defects into waveguide [2][3]. Due to these properties' researchers have widely implement all-optical logic gates using PhCs.
The multiple interferences inside PhC waveguides form photonic bandgap, which is the same as the semiconductor bandgap. The propagation of electromagnetic waves in an arbitrary medium is defined by eigenvalues using Maxwell's equation given below, Where ε(r )is the space-dependent dielectric function, C is the speed of light in vacuum, and H ⃗⃗ (r ) is the optical magnetic field vector of a definite frequency ω. This paper is ordered as follows: Design and working principle of an all-optical AND logic gate are given in Section 2. Section 3 describes simulation results and performance analysis. Finally, a conclusion is presented in Section 4.

STRUCTURAL DESIGN OF ALL-OPTICAL AND LOGIC GATE
The all-optical AND logic gate is used as sampling gate in optical sampling oscilloscope because it have ultrafast operation as compared to electrical components [2]. In this work alloptical AND gate has been implemented using 2-D square lattice PhCs waveguides with an array of 12 silicon rods in X direction and 9 silicon rods in Z direction. The structure contains three junction silicon rods with the radius, r j1 = 0.3a, r j2 = 0.35a and r j3 = 0.07a respectively and two reflecting rods having radius r e = 0.2a. The structure implemented with lattice constant of 'a' is 0.6µm and refractive index (RI) is 3.46. Junction rods r j1 , r j2 and two reflecting rods r e provides fewer back reflections into input ports and, r j3 is chosen to avoid the unwanted less intensity light signals to outport. Figure. 1 indicates the design of an all-optical AND logic gate with two T-shaped waveguides. This structure is designed by using OptiFDTD tool OptiWave software. A proposed all-optical AND logic gate works on the principle of beam-interference. Depends upon relative phase angle or path length of input light signal either constructive or destructive interference has occurred. The phase difference of 2nπ (where n = 0, 1, 2, 3, …) or even integer multiples path difference produces constructive interference and Phase difference of (2n + 1) π or odd integer multiples path difference produces destructive interference. Table 1 represents the input signals from port A, B, and R with initial phase and describes the resultant interference takes place at junction J 1 and J 2 .
where 'c' is the speed of light in vacuum. Simulation results are as follows:

Case 1: Port A is '0' and Port B is '0'
In this case, the absence of a light signal at port A and B indicated as logic '0' and signal incident at port R with the relative phase of 0 0 is represented as logic '1'. The incident reference signal from port R would reach output port Y with very little power due to the usage of reflecting and junction rods. Figure 2 depicts no optical signal that has appeared at output port Y, which is indicated as a logic '0'.

Case 2: Port A is '0' and Port B is '1'
Absence of signal at port A is representing logic '0' and presence of a signal at port B and R represented as logic '1' with an initial phase of 0 0 . The path travelled by the signals from port B to J 2 is 4a and from port R to J 2 is 8a. Destructive interference takes place at junction J 2 due junction rod r j3 . Therefore, at output port Y, no light has appeared as shown in Fig. 3.

Case 3: Port A is '1' and Port B is '0'
Signal incident at ports A and R are representing logic '1' with a relative phase angle of 180 0 , 0 0 respectively and no light signal is incident at port B representing logic '0'. The path covered by the signals from port A to J 1 is 4a and from port R to J 1 is 4a. The path and phase difference between these two signals is 0 and 180 0 , therefore destructive interference has occurred at junction J 1 . Hence, no light signal has appeared across output port Y as shown in Fig. 4.

Case 4: Port A is '1' and Port B is '0'
Presence of light signal at port A, B, and R, are representing logic '1' with a phase angle of 0 0 , 180 0 and 0 0 correspondingly. Signals from port A and R are reached junction J 1 with path length 4a, hence at junction J1 both signals have constructively interfered. The resultant signal is propagated to junction J 2 with path length 4a and path traversed by a signal from port R to junction J2 is 4a. Constructive interference is taking place at junction J2 due junction rod r j3 and resultant high-intensity light signal propagated to output port Y as shown in Fig. 5.     Table 3 represents output power levels of the all-optical AND logic gate with various silicon rod radius values, for all input conditions with normalized input and output power values; while optimizing RI value with 3.42.
The refractive index of the proposed structure is optimized by varying the RI value from 3.4 to 3.48 but RI of 3.4 not satisfied the functionality of optical AND gate. However, RI of 3.42 to 3.48 are perfectly works as AND gate, out of which 3.42 provides the best output power levels. According to obtained values which are depicted in Table 2, CR is calculated and variations of CR for different RI values are indicated in Figure 6.
In equation 1, P1 and P0 are represented optic field levels of logic '1' and '0' respectively.  The performance of the structure has been analysed by calculating the CR and transmission ratio (TR). The TR is defined as where, is optical power at output port Y, + + is the total input power The proposed design is compared with exciting designs in terms of different parameters such as size, CR, TR response time, rise and fall times as depicted in Table 7. As per the mentioned parameters in Table 7 prior design suffer from less CR and occupies high footprint [16,22], the design of AND gate not mentioned about rise and fall times [23] and design of all-optical AND gate has less transmission ratio and occupies more area [26]. As compared with earlier designs the proposed structure occupies less area, provides high TR, high CR, and response time is low.

CONCLUSION
In this work, structure of the all-optical AND logic gate is realized using 2-D PhC waveguide with square lattice silicon rods in the background of air. The performance of the structure is analysed by optimizing the parameters such as refractive index and silicon rod radius. In this structure, reflecting rods and junction rod is used to propagate the light into essential output by reducing unnecessary back reflections. This design exhibits a maximum CR of 18.7dB and more than 97% of TR at 1.55 µm wavelength. The proposed AND logic gate is compact in size, operates at low power levels and power consumption is also less. Therefore, this structure plays an important role in realizing optical devices for computer networks, signal processing and communication systems.