Numerical Simulations of Carrier-selective Contact Silicon Solar Cells: Role of Surface Passivation and Carrier-Selective Layers Electronic Properties

doi:10.21203/rs.3.rs-491788/v1

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Numerical Simulations of Carrier-selective Contact Silicon Solar Cells: Role of Surface Passivation and Carrier-Selective Layers Electronic Properties

https://doi.org/10.21203/rs.3.rs-491788/v1

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published 04 Aug, 2021

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Ag/ITO/MoO_x/n-Si/LiF_x/Al carrier-selective contact (CSC) solar cell structures are modelled and numerically simulated based on the experimental data using an industrial quality base silicon wafer by the Sentaurus TCAD software. The role of (1) electron-selective lithium fluoride (LiF_x) layer and its thickness, (2) hole-selective molybdenum oxide (MoO_x) work function variation, and (3) front contact (MoO_x/n-Si) surface passivation interlayer are explored on the device performance. The electron-selective LiF_x layer at the rear side is led to the strong enhancement in device photocurrent by providing the electrical barrier to the minority carriers (holes) and slight improvement in open-circuit voltage, but the thickness of the layer is sensitive to efficient extraction of the majority carriers (electrons). The hole-selective MoO_x layer work function needs to engineer for inducing the strong inversion layer with better built-in potential at the MoO_x/n-Si junction to achieve high open-circuit voltage from a cell. A thin SiO_x interlayer at the MoO_x/n-Si junction has enhanced the device open-circuit voltage significantly by minimizing the minority carrier recombination at the interface.

Electrical Engineering

Carrier-selective

Electronic Properties

lithium fluoride

Carrier-selective contact (CSC) silicon solar cells are presently getting attension as an alternative to conventional silicon heterojunction (SHJ) cells due to simple fabrication, low parasitic absorption from carrier-selective layers, and high-efficiency potential [1–4]. CSC solar cells rely on wide-bandgap transition metal oxides (TMOs) for charge carrier extraction, where high work function (WF) materials such as molybdenum oxide (MoO_x), vanadium oxide (V₂O_x) and tungsten oxide (WO_x) are employed as hole-selective layers [3, 5], and low WF materials such as lithium fluoride (LiF_x), magnesium fluoride (MgF_x), and titanium oxide (TiO_x) are used as electrons-selective layers [6–8]. The carrier selectivity in CSC cells happens through asymmetric energy band alignment of different TMOs with the c-Si; the difference in WF between TMOs and c-Si produces both extraction of charge carriers and field-effect surface passivation [9, 10].

Apart from experimental effort, the modelling and simulation study has been carried out on CSC solar cells to visualize the role of interface and bulk defect states on carrier recombination and transport mechanisms (band to band or trap-assisted tunnelling) [9, 11, 12]. However, a few research reports on the role of back (electron-selective) contact of CSC cells, Vijayan et al. [10] have observed an improvement in surface passivation and electron selectivity from TiO_x layer along with LiF_x/Al stack by using Sentaurus device simulator. LiF_x alone has also been used as an electron-selective layer due to its simple fabrication process to produce a low resistive path to electrons collection at the rear side of the CSC cell as LiF_x/Al stack [6]. Usually, a thin intrinsic amorphous silicon (i-a-Si:H) layers is used as an interface passivation layer on both conventional and CSC based SHJ cells. However, a thin SiO_x interlayer can also be used as an alternative passivation layer [13, 14].

In this work, we have investigated the CSC cells performance having the device structure Ag/ITO/MoO_x/n-Si/LiF_x/Al using the Sentaurus TCAD simulation, with the emphasis on the role of LiF_x layer and its thickness in the electron selective back contact (n-Si/LiF_x/Al), MoO_x work function in the hole-selective contact (MoO_x/n-Si), and the SiO_x layer on chemical passivation at the front contact. The simulated energy band diagrams at both the contacts are considered for explaining the carrier transport barrier at the interfaces, and the light J-V graphs in device performance. The numerical simulation parameters are considered based on our earlier reported experimental observations [15], to validate the simulated energy band diagrams and light J-V graphs.

The numerical solutions of Poisson, drift-diffusion, and carrier continuity equations are solved in a self-consistent approach. Various physical models have been invoked to analyse the terminal characteristics of CSC solar cell accurately using Sentaurus TCAD software [16]. The thermionic emission model is employed at heterojunction interfaces, which defines the thermionic current and thermionic energy flux better at these abrupt junctions. The recombination of carriers is modelled by Shockley–Read–Hall (SRH) model that includes recombination through defects levels within the bandgap. The surface recombination velocity model is used at the c-Si surface to explore the effect of chemical passivation in the solar cell. The constant mobility model is used in c-Si as the concentration of carriers is low. In addition to these models, the tunnelling models have also been used to define the tunnelling at heterointerface as well as at thin insulator (such as SiO_x and LiF_x). Here, the robust non-local tunnelling model based on the Wentzel-Kramers-Brillouin (WKB) tunnelling probability is used.

The optical generation model based on the complex refractive index of materials is taken to compute the generation from the input spectrum of wavelength. Here, we have employed the standard AM1.5 global as input spectrum to calculate the J-V curve under the illumination. The transfer matrix method (TMM) has been used as an optical solver to calculate plain waves' propagation through layer media (materials). The complex refractive indices (n and k) of materials have been obtained from the Sentaurus database as well as from PV Lighthouse [17]. The schematic and energy band diagram of simulated CSC solar cell is shown in Figs. 1a and 1b, respectively. The material parameters used for the device simulation are tabulated in Table 1.

Table 1

Material parameters considered in numerical simulation of CSC solar cells.
Parameters	Ag	ITO	MoO_x	SiO_x	c-Si(n)	LiF_x	Al
Material Assumption	Metal	Metal	Metal	Insulator	Semiconductor	Insulator	Metal
Global model	-	Fermi, Thermionic emission, Hetero Interface, Drift-diffusion
Model Used	-	-	-	Barrier Tunnelling	-	Barrier Tunnelling	-
Bandgap	-	-	-	8.9 eV	1.12 eV	10 eV	-
Electron affinity	-	-	-	1.0 eV	4.05 eV	2.87 eV	-
Work function	5.1 eV	5.5 eV	4.8–6.7 eV	-	-	-	4.1 eV
Bulk lifetime	-	-	-	-	300–2000 µs	-	-
Dielectric constant	-	-	-	3.9	11.7	6.0	-
Electron mobility	-	-	-	-	1417	-	-
Hole Mobility	-	- -	-	-	470.5	-	-
Tunnelling mass (m_t/m_e)	-	-	-	0.4	-	0.4	-
Doping Density	-	-	-	-	3 × 10¹⁵	-	-

3.1 Role of electron selective contact on cell performance:

Figures 2a and 2b show the light J-V graphs and energy band diagrams of CSC cells with and without LiF_x interlayer at the electron-selective back contact. The cell with LiF_x structure shows an increase in efficiency by ~2% due to an improvement in V_oc and J_sc by ~20 mV and ~3 mA/cm², respectively. The characteristics of both the J-V graphs are the same (Fig. 2a); however, the cell with LiF_x (Fig. 2b) shows a downward bending in conduction and valance bands along with the better quasi fermi-level splitting.

The LiF_x layer facilitates the downward band-bending at CSC cell's rear contact between the c-Si and Al, due to the low WF. The band bending at the n-Si surface leads to the generation of an electric field, which provides an energy barrier for the holes (minority) at the interface and reduces the carrier recombination with the electrons (majority carriers). Also, the band bending produces field-effect passivation by creating an imbalance in charge carrier (electron/hole) concentration due to the repulsion of holes at LiF_x/Al interface by enhnacing the minority carrier diffusion length within the bulk n-Si, which also led an increase in J_sc of ~3 mA/cm² from the cell [15]. An increment in V_oc (~20 mV) is observed due to the large minority carrier density with the better quasi fermi-level splitting. However, in our experimental results, an improvement of ~25 mV in V_oc is observed [15], the deviation from the experimental value can be because of other layers, which are not well calibrated. Also, a minor shunting effect due to the cell area is noted in the experimental J-V graphs, which is not considered in the numerical simulation. The LiF_x interface also reduces the fermi-level pinning at the c-Si surface, which is the case with the direct contact of Al with the n-Si wafer [18]. The thin LiF_x interlayer capped with Al contact can also reduce the contact resistivity to some extent [19].

The collection of electrons happens from the rear side through carrier tunnelling, which is very sensitive to layer thickness [6]. Figures 3a and 3b show the J-V curves of cell and band diagrams of c-Si/LiF_x/Al structure for different LiF_x layers' thicknesses. The width of the tunnel barrier for charge carriers is very sensitive to LiF_x thickness, which increases with an increase of LiF_x thickness (from 1 to 2.5 nm) and can be seen from figure 3b. For LiF_x thickness <2.5 nm, the J-V curve does not show any change in its characteristics. However, a distortion in the shape of J-V characteristic is observed for LiF_x thickness ≥2.5 nm due to an increase of resistance to electrons from the cell's back side. The J-V curve deviates from its original characteristics shape, indicating an increase in series resistance, which lowers the cell’s FF by 8% and efficiency by ~2%. The n-Si conduction band bending also reduces with an increase in LiF_x thickness due to an accumulation of electrons at the rear interface.

3.2 Effect of SiO_x front contact surface passivation on cell performance:

Figures 4a and 4b show the light J-V graphs and energy band diagrams of the cells without and with SiO_x interlayer at the front contact. The cell with SiO_x interlayer shows an increase in efficiency by ~2% as result of improvement in V_oc and Jsc by ~57 mV and ~0.83 mA, respectively. A difference in quasi hole fermi-level splitting is also observed for the cells.

An upward band bending results at the MoO_x/c-Si interface due to carrier inversion at the c-Si surface because of the significant difference in WF between MoO_x and c-Si, which is further enhanced with the SiO_x interlayer. The upward bending enhances the holes collection and simultaneously provides an electron blocking field (due to carrier inversion) at the front contact. The enhanced field with the SiO_x interlayer lowers the flow of electrons to the front contact and therefore reduces the charge carrier recombination with the better chemical passivation on the front c-Si surface. The recombination of carriers is proportional to the accessibility of both the charge carriers (electrons and holes) [20]. Thus, the SiO_x interlayer accompanied by the MoO_x hole-selective layer shows better performance due to the combined chemical and field-effect passivation. This effect has led to an enhancement of the V_oc from 575 mV to 632 mV in the cell. Due to the insulating nature of SiO_x, a spike in the band diagram is noted at the MoO_x/c-Si interface (Fig. 4b), which will allow the hole and can hinder the electron transport [21]. The thickness of SiO_x should not be greater than the tunnel barrier limit (~2 nm), so that the carriers can tunnel (band to band or hopping through traps) the interfacial barrier [22]. Also, the SiO_x interlayer's uniformity is very important for achieving the uniform chemical passivation of c-Si surface by suppressing most of the silicon dangling bonds.

3.3 Effect of MoO_x work function on front contact of cell performance:

To investigate the role of MoO_x layer’s WF, the device is simulated for a range of varying WF (from 4.80 to 6.70 eV). The simulated J-V graphs of cells and energy band diagrams of the MoO_x/n-Si junction with different MoO_x WF are shown in figures 5a and 5b, respectively. The corresponding photovoltaic parameters are presented in table 2. The MoO_x/c-Si junction is taken as the Schottky contact due to a significant WF difference between the MoO_x and n-Si, which gives rise to upward band bending in the energy bandgap on the front c-Si surface [3].

Table 2 Photovoltaic parameters of cells obtained from simulations with different MoO_x layer work functions.

Work function (eV)	V_oc (mV)	J_sc (mA/cm²)	FF (%)	Efficiency (%)
4.8	454.20	32.47	63.50	9.36
4.9	549.10	32.47	69.30	12.36
5.0	577.80	33.78	79.06	14.84
5.5	577.70	33.78	81.79	15.35
6.0	602.30	35.24	81.53	17.47
6.7	633.80	35.24	81.33	18.17

With decreasing of MoO_x layer’s WF, the reduction in band bending is observed (Fig. 5b). The low band bending cannot produce a significant field to block the electrons and thus promotes the carrier recombination at the MoO_x/c-Si interface with the photogenerated minority carrier (holes) [9]. Also, the low band bending hinders holes transport and increase the device resistance. However, in the case of higher MoO_x WF (>6 eV), the carrier transport at the MoO_x/c-Si interface happens through band-to-band tunnelling [10,11]. Also, a large hole concentration is induced at the interface, which inverts the charges’ polarity at the c-Si surface. As a result, the hole conductivity is increased that provides better selectivity and leading to high V_oc. The decrease in MoO_x layer’s WF is observed due to the reduction of oxygen vacancies [23]. For the mid-range of MoO_x WF (5.0 eV<WF<6.0 eV), the carrier transport happens through trap states that exist in the MoO_x bandgap [12], which also can provide the low resistive path to electronic transportation. However, with the low value of MoO_x layer’s WF <5.0 eV, a hole transport barrier is observed, which hinder the hole selectivity by MoO_x layer and produce an S-shape in J-V curves, which degrades the performance of the CSC solar cells [24].

Further improvement in the device efficiency can be visualised by employing high quality c-Si wafer. Figure 6 shows the simulated J-V curves under illumination with different c-Si bulk lifetimes, an enhancement in V_oc is very clear with an improvement in the bulk lifetime of n-Si wafer from 300 to 1500 µs. As a result, the device power conversion efficiency reaches ~20% with V_oc of >700 mV. So, the overall performance of the CSC solar cells can be fine tuned by good bulk lifetime values as well as with the better c-Si surface passivation quality.

For Ag/ITO/MoO_x/n-Si/LiF_x/Al CSC solar cell, the LiF_x interlayer is verified as an efficient electron-selective layer compared to direct Al contact on the c-Si back contact. LiF_x/Al back contact's field effect is observed with downward band bending in simulated band diagram, which is reflected on the better performance of CSC cells. The carrier tunnelling length is limited by ~2 nm LiF_x layer, further increase in thickness is reduced field-effect passivation with the minimal conduction band bending. The improvement in CSC cells' performance has also been observed with a thin SiO_x interlayer due to a significant reduction of surface recombination. The role of hole-selective front contact in carrier recombination and transport mechanisms is analysed by varying MoO_x’s work function in three different ranges (high, medium, and low). The hole collection barrier is observed with the low the work function of MoO_x layer (<5.0 eV). These numerical simulations can provide some information on the electronic properties of carrier-selective layers apart from the critical role fom surface passivation and bulk lifetime of base silicon wafer.

Acknowledgements

Authors would like to acknowledge DST/Intel®/IUSSTF (Grant number: RP03472) for financial support of the research work, and Dr S. P. Singh for the fruitful discussion.

Data Availability

The datasets generated during and/or analysed during the current study are available from the corresponding author on reasonable request.

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Numerical Simulations of Carrier-selective Contact Silicon Solar Cells: Role of Surface Passivation and Carrier-Selective Layers Electronic Properties

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