The performance of a three dimensional integrated circuit primarily depends on the filler material used in through silicon via (TSV). The mostly used filler material Cu is primarily facing severe reliability issues due to the skin effect and electromugration related problems at high frequencies. Therefore, in recent, single- and multi-walled carbon nanotubes (SWCNT and MWCNT) have been emerged as suitable filler materials in TSV. Additionally, at high frequencies, an electrmagetic force primarly induces to an eddy current that adversely affects the overall performance of a TSV. This paper for the first time demonstrates the impact of eddy current on Cu, bundled SWCNT and MWCNT based TSVs. An accurate RLGC circuit model is proposed by considering the eddy effect at the depletion layer and the silicon substrate region. The equivalent circuit parameters are modelled at 7 nm technology using a three line driver-via-load setup. Using the proposed setup, crosstalk and power disspation are analyzed with and without considering the eddy effect. Irrespective of TSV heights, the MWCNT bundle demonstrates substantially lower crosstalk delay, peak noise and power dissipation in comparison to the Cu and SWCNT bundle based TSVs.