Development of High-Sensitivity Piezoresistive Pressure Sensors for -0.5…+0.5 kPa

A mathematical model of an ultrahigh sensitivity piezoresistive chip of a pressure sensor with a range from -0.5 to 0.5 kPa has been developed. The optimum geometrical dimensions of a specific silicon membrane with a combination of rigid islands to ensure a trade-off relationship between sensitivity (S samples = 34.5 mV/kPa/V) and nonlinearity (2K NL samples = 0.81 %FS) have been determined. The paper also studies the range of the membrane deflection and makes recommendations on position of stops limiting diaphragm deflection in both directions; the stops allow for increasing burst pressure P burst up to 450 кPa. The simulated data has been related to that of experimental samples and their comparative analysis showed the relevance of the mathematical model (estimated sensitivity and nonlinearity errors calculated on the basis of average values are 1.5% and 19%, respectively).


Introduction
There has been constant development of piezoresistive pressure sensor chips with ultrahigh sensitivity, which offers new approaches to the solution of the following relevant tasks: • Enhancement of sensitivity; • Reduction in size; • Decrease of errors of: o nonlinearity, o temperature dependencies, o time stability; • Increase of overload ability.
The knowledge of the relationship between the above parameters facilitates the development and adaptation of OEM elements in medical applications (CPAP and spirometry), ventilation systems (VAV and HVAC), automotive (TPMS and exhaust gas circulation), custom appliances (drones and smart devices) and other industries (e.g., power and aerospace industries) [1-3]. The market segment of silicon piezoresistive pressure sensors is sufficiently large and is progressively developing [4][5][6][7][8][9] and the reason for this trend is the need for fabrication of this new chip. The main objective is to create a pressure sensor operating in a differential pressure range of -0.5 to +0.5 кPa with sensitivity S > 30.0 mV/кPa/V, a nonlinearity error 2KNL < 1.5 %FS and mechanical overload ability Pburst > 300 кPa. The design presented in the paper is based on the simulation of operation of the selected membrane structure. The model of an ultrahigh sensitivity chip is eventually analyzed with regard to the experimental data from the obtained samples.

Pressure sensor design
A classical Wheatstone resistive bridge is used as an electric circuit for the topside of a pressure sensor chip. The Journal XX (XXXX) XXXXXX Basov M, Prigodskiy D. 2 most important starting condition for the design of a pressure sensor chip is its area, 6.15х6.15 mm in this case ( Figure 1). Frame area on the backside of the sensor chip is used for a fluid-proof connection with a bottom stopan intermediate element of silicon assembly (frame width Y = 690 µm).
Bottom stop provides isolation of the sensor chip from thermomechanical packaging stress and enhances mechanical strength of the silicon assembly. A diaphragm with rigid islands (RI's) is formed in the central part of the sensor chip with help of anisotropic wet etching. Side walls of the etched cavity form angle of 54.7° with the plane of the wafer (width of side wall projection on the plane of the wafer is G = 285 µm). The final area for a thinned part of the membrane is 4.20х4.20 mm. The other essential factor is the design strength. Based on the data of similar available analogs, e.g. from SMi (SM95G) and Acuity (AC3070) [10,11], or presented in the articles [12,13], it can be said even without building a mathematical model that the chip should be connected with the stops to achieve the burst pressure that 600 times as large as the rated pressure. The mechanical part of pressure sensor includes a membrane structure with three separate mechanical stress (MS) concentrators or rigid islands (RI), and two MS concentrators connected to the frame. The thickness of RIs is equal to the wafer thickness. The selected structure of the membrane with RIs allows concentrating high MS at small deflections, which reduces a nonlinearity error [14,15]. The geometrical parameters of the chip are as follows: Lchip side length, Wthickness of the membrane thinned part, Hchip thickness, Aarea of the membrane thinned part, Dwidth of a gap between RIs, Z -RI edge length, Ychip frame width, Gmembrane etch taper projection width. Pairs of piezoresistors (PRs) with a dimension of 20х400 µm are located on the thinned part of the membrane in the regions of compression and tension, i.e. of MS of different signs. Although reactive ion etching (RIE) of silicon is widely employed for fabrication of chips for ultra-low pressure ranges [16][17][18][19][20][21], the membrane structure is formed using wet anisotropic etching without use of RIE from either the top or back side of the chip.
It is worth noting that alternative electric circuits may be used for similar ultrahigh sensitivity chips either to enhance the sensitivity or decrease the dimensions of a chip relative to its analogs with a resistive bridge by combining together a large number of PRs. The novel electric circuit is made as the differential amplifier (PDA) using BJT [22][23][24][25]. The development of such pressure sensor chips is still at the beginning of the road, but the mathematical model and experimental data, that have already been demonstrated, indicate that PDA has an obvious advantage in this application.

Modelling of Sensitivity and Nonlinearity
The structure of a pressure sensor chip was modeled and experimentally fabricated on silicon wafers n-type with a crystal orientation (100). PRs, used in a classical Wheatstone resistive bridge, are oriented along the crystallographic direction [110] and formed, using boron doping (p --region), with the following parameters: surface concentration NSp-= 5.5•10 18 cm -3 , surface resistance RSp-= 200 Ohm/cm -2 , depth of a p-n junction xjp-= 2.5 µm. The main piezoresistive coefficient π44 = 1.26•10 -9 •Pa -1 at room temperature [26]. In order to connect PRs with metal layer, high-alloy conducting p + regions (Nsp+ = 7.4•10 19 cm -3 , xjp+ = 3.6 µm, Rsp+ = 17 Ohm/cm -2 ) are also used, they have a sufficiently low piezoresistive coefficient and are located in regions of low stresses. A contribution of p + conducting regions in a computing model is not significant and will be not taken into consideration. A thin aluminum layer (WAl = 0.8 µm), applied on the chip frame [27][28][29][30], is needed to reduce temperature hysteresis.
The calculation of a change in the PR value and, consequently, output sensitivity and nonlinearity is carried out based on the theory of piezoresistive effect from the following formulas: With the selected membrane structure, variation of different geometrical parameters was considered: (a) RI width (Figure 2; Q1distance between middle PRs, Q2distance between end PRs), (b) RI edge length, (c) gap between RIs, and (d) the membrane thickness. In order not to overburden the paper with statistical data, we will present only the most relevant options of variation of one of the parameters, provided the selected optimum values for the rest of geometrical dimensions of the membrane remain unchanged. The sensitivity and nonlinearity are calculated using average MS values across ZxD areas in equations (1-4). The pressure is applied from the backside of the chip in a range of 0.0 to 0.5 кPa and an increment of 0.1 кPa. When assessing sensitivity and, which is more important, nonlinearity, it is necessary to take into consideration a possible spread in the parameters to ensure that the final samples satisfy the requirements for the parameters at the bottom boundary of the array. Therefore, it is desirable to achieve S > 35.0 mV/кPa/V and 2KNL < 0.75 %FS.  The optimum geometry at variation of the RI width is a ratio Q1/Q2 = 1122/3366 µm as the balance between sensitivity and nonlinearity is maintained (Figure 3(a)). At Q1/Q2 = 1000/3000 µm sensitivity is S < 20 mV/кPa/V and at Q1/Q2 = 1244/3732 µm nonlinearity is relatively high at a lower sensitivity (relative to Q1/Q2 = 1122/3366 µm). At variation of the length of a RI edge one more significant feature associated with a spread in the values of the RI edge length should be taken into consideration. As seen from Figure 3(b), Z = 400 µm is the optimum value as at a smaller value of Z = 300 µm there is an acceptable enhancement of both sensitivity and nonlinearity, further decreasing will result in a considerable growth of nonlinearity. In the opposite situation at Z = 500 µm sensitivity and nonlinearity sufficiently decrease, further increasing will result in lower sensitivity. The estimate of the output parameters relative to a change in the width of a gap between RIs (Figure 3(c)) shows that the optimum rated width of a gap is 10 µm. But we have again to deal with the spread that makes it problematic to guarantee a required width of a gap of 10 µm with the largest possible thinningdown of the membrane for PR of width 20µm at photolithography (24.2 µm with regard to a contribution of sideways diffusion). The width of a gap should be preferably increased up to D = 18 µm even at the expense of a small reduction of sensitivity. As expected, the sensitivity and nonlinearity sharply change with a change of the membrane thickness (Figure 3(d)). Theoretical computation showed that the membrane thickness should be W = 8 µm and a spread in the thickness should be minimum as its increase or decrease could lead to significant reduction of sensitivity or growth of nonlinearity, respectively.    The mathematical model eventually permits to predict fabrication of samples with an average sensitivity Smodel = 34.0 mV/кPa/V and nonlinearity 2KNLmodel = 0.68 %FS. The membrane deflection at the rated pressure is ∆h0,5 = 2.7 µm.

Modelling of Increased Strength
In order to increase the strength of a chip, the silicon assembly utilizes stops from both sides of the chip ( Figure  5): the bottom stop is fabricated as an intermediate element between the chip and the base, it is connected across the area of the chip frame and has via holes through which pressure is applied from the base; the top stop is made as a regular parallelepiped, it is connected from both sides of the chip in points without metallic pads and has unconnected areas to apply pressure from the topside of the chip. The elements of the assembly including a chip, top and bottom stops and a base are bonded using low temperature glass, the combination of the glass and the selected assembly allow lessening a thermo-mechanical effect from the package [31]. Journal XX (XXXX) XXXXXX Basov M, Prigodskiy D. 5 A gap between the chip membrane and the bottom and top stops that determines a free movement of the membrane is ensured by the thickness of low temperature glass. The movement of the membrane should be free in an operating pressure range of -0.5 to +0.5 кPa with a reasonable margin in order to exclude the possibility of early touching, which can significantly influence nonlinearity of an output signal. The movement of the membrane should be additionally held by the stops before the structure is on the point of destruction. Theoretically, irreversible critical deformable states can be achieved at σchip. theor. < 500 MPa [32]. Figure 6 presents the relationship between the maximum MS, deflection of the middle of the membrane and the pressure. With regard to these conditions, the membrane should be set on the stops in a pressure range Ptouch model of 1.0 to 4.5 кPa. The simulation of the geometry of the membrane deflection in the given pressure range permits to conclude that the thickness of the low temperature glass is great enough to guarantee a gap between the chip and the stop htouch model of 5 to 23 µm needed to provide the required membrane deflection.

Results
Based on the built mathematical model, samples of ultrahigh sensitivity chip of pressure sensors were obtained. The results of the implementation of technological processes aimed to form the topside of the chip guaranteed a spread in surface resistance RS (surface impurity concentration NS) and, consequently, resistor value (Rbridge = 4.5 кOhm) within 7% error (output signal ∆V0samples = -5…+5 mV/V At anisotropic wet etching without self-hardening a spread in the membrane thickness was ∆W = ± 3 µm on 5 plates 100 mm in diameter. For further investigation chips with a thickness Wsample of 8 to 9 µm were selected in order to get as far as possible closer to the values of the chip geometry in the mathematical model. Besides a spread in the membrane thickness, there is also an asymmetry in the layout of RI edges on the samples (Figure 7). Fig. 7. Membrane of experimental samples: (а) general view; (b) layout of PR p --regions relative to RI structure. Table 2 contains the values and errors of input parameters (the membrane geometry) and output electric parameters of 62 obtained samples. There is some difference in the values of sensitivity and nonlinearity when pressure is applied from the topside and the backside of the chip. The volume of chips exhibits residual MS (compressive stresses) arising from a step structure of silicon oxide SiO2 (WSiO2 = 0.2…0.6 µm), obtained at formation of different types of doped regions without compensation of MS (tensile stresses) from a layer of silicon nitride Si3N4 [33][34][35][36][37]. After a theoretical value of an output signal is calculated for each individual sample as an arithmetic average of the output signal values at ∆Vout(∆P+ = 0.1 кPa)samples and ∆Vout(∆P-= -0.1 кPa)samples and compared with V0samples, it can be concluded that the membrane is bent upwards (as shown in Figure 3 Tests of samples for an overload ability showed that the membrane of ultrahigh sensitivity chips breaks at Pburst without stops ≈ 9 кPa independently of the direction in which pressure is applied. Figure 8 gives an example of output signal variation (relative to an output signal of each sample at P = 0 кPa) for ten typical samples with stops (a Journal XX (XXXX) XXXXXX Basov M, Prigodskiy D. 6 blue sector refers to the operating pressure range). As seen from the analysis of the dependencies, the membrane is set on the stops from both sides in a pressure range Ptouch samples of 2 to 5 кPa. The area of the surface-to-surface contact of the membrane and the stops at an additional overload pressure is gradually re-allocated and the sensor breaks down at the pressure Pburst above 450 кPa.

Conclusion
In the course of the development of an ultrahigh sensitivity, pressure sensor a mathematical model for the selected design of a chip with a resistive bridge circuit has been built and used to obtain and investigate a certain amount of samples. The optimum geometry of the membrane for chips of pressure sensor, operating in a range of -0.5 to +0.5 kPa, has been defined based on a possible trade-off relationship between sensitivity and nonlinearity. A comparative analysis of average values of the simulated data (Smodel = 34.0 mV/кPa/V and 2KNLmodel= 0.68 %FS) and experimental data (Ssamples = 34.5 mV/кPa/V and 2KNLsamples = 0.81 %FS) showed that the model was capable of predicting operating modes of the selected chip design on the basis of average values with sensitivity and nonlinearity errors of 1.5% and 19%, respectively. A considerable difference between nonlinearity errors of the calculated and experimental values is due to a SiO2 layer on the samples; at the early stages of the model development SiO2 was not taken into account. It is necessary to narrow a spread in the output characteristics of sensors through technological upgrading [38][39][40][41][42][43][44][45][46] for making a more detailed assessment of the model and increase the percentage of samples with desired parameters. The technological upgrading includes dry and wet stop-etching, compensation of residual MS on chips from SiO2 and Si3N4 films, precision alignment at lithography relative to an orientation flat of the wafer or use of silicon wafers with initial low misorientation of the crystal orientation and orientation flat [47,48].
A silicon assembly with top and bottom stops to increase burst pressure of a sensor has been additionally developed. Based on the mathematical model, a technological process for bonding chips with stops has been implemented, which makes it possible to achieve the required gap for a free movement of the membrane in the operating range up to the moment of breaks (Ptouch samples = 2…5 kPa). The sensor breaks at Pburst above 450 кPa, which satisfies the required conditions with Х1,5 margin.      Maps of MS distribution (а) and membrane de ection (b) for the membrane geometry at 0.5 кPa. Assembly design: (а) schematic connection of a chip, stops and a base; (b) a pressure sensor assembly in the package.   Membrane of experimental samples: (а) general view; (b) layout of PR p--regions relative to RI structure.