Charge Density Based Small Signal Modeling for InSb/AlInSb Asymmetric Double Gate Silicon Substrate HEMT for High Frequency Applications

This paper proposes the Asymmetric Double Gate Silicon Substrate HEMT (ADG-Si-HEMT) to study the carrier concentration and intrinsic small signal parameters of the InSb/AlInSb silicon wafer DG-HEMT device. The HEMTs work as a three-port system and the device is named Asymmetric Double Gate HEMT when the top and bottom gates are biased with different gate voltages. The position of quasi-Fermi energy levels (Ef) is used to investigate the modulation of back-channel charge density caused by the front gate voltage. Also, the small signal model is obtained for a various parameters such as cut off frequency, gate to source capacitance and transconductance. To enhance device operation, the effects of the following factors are being investigated delta doping, drain current for various top and bottom gate voltages. The transconductance 2390 Sm/mm for Vfg = 0.2 V and cut off frequency around 197 GHz for Vbg = 0.3 are obtained. The analytical results are compared to the results of the Sentaurus 3-D TCAD simulation. Because of the variation in threshold voltage and modifying carrier density in dual channels, the asymmetric biassing approach has a wide range of mixed applications.


Introduction
In this article, InSb based asymmetric HEMTs are presented to enhance the performance of the HEMT. The Indium Antimonide (InSb) based High Electron Mobility Transistors (HEMTs) are the most suitable for high-speed applications due to their highest electron mobility (30,000 cm2 V −1 S −1 ) and high saturation velocity (5 × 10 7 cm/s) than the other known compound semiconductors [1][2][3]. HEMTs are symmetric or asymmetric, depending on how the top and bottom gates are biased [4,5].
As asymmetric DG-HEMT, the potential well is formed perpendicular to the interface between layers AlInSb and InSb because of their bandgap differences, and charged electrons are transferred from the doped (delta doping-δ) layer to the InSb layer [6]. The accumulation of transferred electrons in the narrow bandgap material (InSb) is referred to as a potential well or a twodimensional electron gas(2DEG) [7]. The Coulomb scattering is reduced in the high electron mobility transistor because the electrons are separated from the donor atoms. The electrons are permitted to move in the vertical direction of an interface and the concentration of electrons depends on the gate bias and delta doping of the barrier layer [8][9][10][11][12].
The operation of Asymmetric Double Gate HEMT differs from the typical HEMTs. The bottom channel carrier concentration is fixed by the back gate voltage in the fabrication itself and variable voltage is applied to the top gate. Therefore, the top gate took control and modulates the electron's accumulation in both channels. This system works like typical HEMTs but the single gate controls the dual channel and it provides double the amount of current density than the conventional HEMTs. The variable front gate bias provides better immunity against the second order effects, enhanced gate control over the channel and additional flexibility achieved in the threshold voltage by controlling the backchannel carrier concentration [13].
Therefore, a detailed analysis is necessary to understand the sheet charge density (n s Cm −2 ) in the Asymmetric DG-HEMT device. There are several linear and nonlinear analytical models are proposed since the 1980s to calculate charge density in the channel. The linear approximation for Fermilevel (E f ) versus sheet charge density (n s ) was done by Drummond and the team [14]. Since 1988, various other research groups are expressed the non-linear approximation of E f versus n s but these approximations are appropriate only if devices are not operated in the subthreshold region [15]. Further, Dasgupta expresses the good nonlinear approximation but this expression is not suitable for a wider range of n s values [16]. Finally, the new expression for Fermi energy level versus sheet charge density is proposed by Jinrong and Fermi energy level (E f ) is calculated for three different values of n s . [17,18]. Based on this approximation the Asymmetric double gate HEMT sheet charge density (ns) is calculated for three different regions of operation (V fg > V th1 + k 1 , V th1 < V fg < V th1 + k 1 ,< V th1 + k 1 ). Further, the front gate modulation on the backchannel is expressed using Gauss's law. In general, this analysis leads to further analysis of the frequency performance and speed of carriers in the channel. Because the gate length and gate foot to channel distance are interrelated to the frequency performance of the device [19][20][21]. So, In the continuous analysis of charge density, the work extended to calculate the small-signal model to extract the Gate to Source Capacitance, Cut off Frequency and Transconductance are obtained of Asymmetric DG-HEMT.
2 Device Structure Description Figure 1 shows the cross-sectional view of Asymmetric Double Gate HEMTs (DG-HEMTs). The wide bandgap material Aluminium Indium Antimonide (AlInSb) grown over a narrow bandgap material Indium Antimonide (InSb), therefore the 2-dimensional electron gas or quantum well is formed in narrow bandgap material, unlike the MOSFETs. In the Asymmetric DG-HEMT device, two quantum wells are formed on the back and forth of the InSb layer because the InSb is inserted between the two wide bandgap AlInSb materials and two identical gates are placed on the top (V fg ) and bottom (V bg ) of the device structure. The cap layer is used to reduce the conduct resistance of Ohmic conducts, followed by AlInSb barrier layer width is T a , AlInSb spacer width is T s , delta doping AlInSb layer width is T d with doping concentration N D and the total width of AlInSb layer is T = T a + T s + T d on both sides of InSb layer thickness is T ch . The device parameters are listed in Table 1. Silicon is employed as a substrate for the growth of InSb and AlInSb materials. Figure 2 shows the energy band diagram of the Asymmetric DG-HEMT for three different circumstances. The solid line signifies the conduction of both top and bottom quantum well, the dotted line signifies the front channel is in the threshold region but the backchannel is conducting, the dashed line signifies the front channel is in the cut off regions but the backchannel is conducting with fixed back gate voltage V bg . In this analytical model, the source and drain contacts are limited for channel region and do not consider for parallel conduction. T eδ -doping (T a ) 3 x 1 0 23 cm-3 3 4 Silicon wafer AlInSb (Ts) 1x10 18 cm-3 7 5 Silicon wafer InSb (T ch ) -20 6 G a t eL e n g t h( L ) -80

Top and Bottom 2-Dimensional Electron Gas
The 2-dimensional electron gas/quantum well is formed at the boundary of two dissimilar compound semiconductors due to the variance in the electron affinity of the materials. The electron transfer across the interface can be written by equating the depletion of carriers from the barrier AlInSb Silicon layer to the accumulation of carriers in the quantum well InSb Silicon layer. The maximum quantity of carriers is depleted from the AlInSb barrier layer is given by using Lee theory [22], where Ɛ A is the permittivity of the AlInSb barrier layer, ΔE ci is the conduction band discontinuity of top (i = 1) and bottom (i = 2) hetero-interface, E Fi quasi-fermi energy level of top and bottom hetero-interface and q is the electron charge. For large negative voltage is applied to the gates, the gate depletion and the heterointerface depletion will overlap, in this case, eq. (1) is replaced by the Poisson Equation for the solution of top and bottom interface and expressed by where, V GSi (i = 1 for top-gate bias V fg and i = 2 for bottom gate bias (V bg ), V off is threshold voltage.
where ϕ bi barrier height of the top and bottom gate. The model formulated using the relationship among the sheet charge density (n s ) and quasi-Fermi energy level (E F ) and the accurate model for Fermi level (E F ) versus carrier concentration (n s ) is expressed by Pu [23].

Sheet Charge Density of Top Hetero Interface AlInSb/InSb (n s1 )
The charge density of the top channel is found by substitute eqs. (3) and (4) in (2).
The top channel sheet charge density (n s1 ) is obtained as where, Similarly, the backchannel carrier concentration is fixed by the back gate bias (V bg ), but the large voltage applied to the top gate (V fg ) at V fg = V off1 the top channel enters into the subthreshold region and the carriers are got depleted subsequently at V fg = V off1 + K 1 . Therefore, the top gate bias is starting to modulate the back gate channel carrier concentration at V fg > V off1 . The modulation of back-channel carrier concentration (n sm ) is expressed as [24,25].
where the E 1 and E 2 are the vertical electric field at the top and bottom interface and is given by Substituting eqs. (9) and (10) in eq. (8), we get the modulation of the back carrier concentration along with front gate voltageand the fixed bottom gate voltage is formulated as To obtain the charge control model for the modulated backchannel, the new relationship between the quasi-fermi energy level of back-channel (E F1 ) and the modulated carrier concentration by front gate bias is required.
The above equation leads to the new relationship between the E Fd2 and n sd2 same as reported in Eq. (4) and is given by However, the depletion of charge carriers in the backchannel is equal to the accumulation of charge carriers in the top heterointerface. So that the top heterointerface is the function of E Fd2 and it is formulated as In the last term in the above equation, the multiplication of top hetero-interface (E 1 ) and channel thickness (T ch ) is added to analyse the effect of channel thickness in the charge control model.
Similar to front channel sheet charge density (n s1 ) and carrier density (n s2 ) of the backchannel is found from the eq. (4) (11) and (15). The total sheet charge density of the Asymmetric DG-HEMT device for the three regions of operation is expressed as

Drain Current Model for AlInSb/InSb/AlInSb Silicon Substrate Asymmetric DG-HEMT
The general solution of the drain current model for Asymmetric DG-HEMT is given by where the v(y) is the carrier velocity in the perpendicular direction of the heterointerface taken as a field-dependent parameter [26,27] and expressed as v y ð Þ ¼ where the E y ð Þ ¼ dV y ð Þ dy is the electric field in the 2dimensional electron gas, μ 0 is the carrier mobility at the hetero interface, v sat is the electron saturation velocity at the interface and E c ¼ v sat μ 0 is the critical field.

Front Channel Drain Current (I D1 ) at the Linear
The drain current for the top channel at the linear region is found by substituting the eq. (18) in general drain current model Eq. (17) for v(y) at E < 2 E c .
Taking integration on both sides with respect y from "0" to "L" and substituting the boundary conditions V(0) = 0 and V(L) = v d , we obtain the drain current of the top channel as The drain current is obtained for the saturation region at the channel near the drain, the electron velocity is saturated at v sat . where,

Back-Channel Drain Current (I D2 )
The expression of the drain current for backchannel hetero interface (I D2 ) requires the sheet charge density (n sm ) (variation effect of back-channel due to the front gate voltage) at the backchannel but it is complicated to solve eqs. (15) and (4) iteratively. So that the sheet charge density (n sm ) is obtained using the polynomial relationship between the modulated carrier densities (n sm ) and front gate bias V fg [26]. The drain current for backchannel hetero interface is obtained using a fourth-order polynomial relationship.
where, p j is the polynomial coefficient. Substituting the eq. (23) and (18) in (17) we obtain the drain current expression for backchannel hetero interface for v(y) at E < 2 E c as follows Integrating the above equation concerning for to y from "0" to "L" and V(0) = 0 and V(L) = V DS , the drain current expressed as.
For linear region For Saturation region Finally, the total drain current is obtained from the top and bottom heterointerface drain current eqs. (21) to (25) and is express as

Small Signal Equivalent Circuit
The traditional small signal equivalent circuit is shown in Fig.  3, it consists only of the intrinsic components. R i1 , R i2 ,R gd ,C gd1 ,C gd2 ,C gs1 ,C gs2 , are the intrinsic parasitic resistance and capacitance. The ratio between the variation in the drain current with respect to changes in the drain to source voltage is called drain current (G d ). [27] The Y m is calculated using the following equation where V gs1 = V fg , V gs2 = V bg , τtransient time, ωangular frequency. g m is the transconductance and it is calculated as the ratio of drain current to gate to source voltage with constant drain voltage.

Results and Discussions
In this sheet charge model, the 2-dimensional electron gas concentration of the front and back channel is analyzed with a fixed back gate voltage and variable front gate voltages for three different regions of operation at the position of x = 0 and x = T ch . Also, the relationship of the backchannel with the applied front gate voltage is expressed using Gauss's Law. The drain current is developed separately for the front and back channel because the independent bias is applied to the gates and the device act as a three-port system. The drain current is compared with sentaurus 3D-TCAD tool simulation results. In the device simulation, the carrier transport mechanism is represented using concentration-dependent mobility, electric-field dependent mobility, Shockley-Read-Hall (SRH) recombination, Auger recombination, and Bandgap narrowing techniques [28][29][30][31]. Fig. 4 (a) and(b) predict the electron density modulation in the backchannel along with front gate voltage for three different fixed back gate voltages. The negative voltage at the front gate starts to deplete the charge carriers on the backchannel. The continuous injection of increasing negative voltage on the front gate completely depletes all charge carries and makes the backchannel turn off, this modulation effect is predicted in eq. (11). Further, the backchannel carrier concentration also depends on the back gate bias, the channel thickness, and doping, it is shown in Fig. 4(b). In this plot, both the channel thickness (T ch = 30 nm, 25 nm) is saturated at the same level of the backchannel carrier concentration with fixed back gate bias. But, the thicker channel requires more negative voltage to turn off the device. Also, the thick channel layer creates two separate 2DEG at the top and bottom of the channel layer.
The top gate controls both channels but the shrinking in the channel thickness may cause two junctions of the interface to gets overlap. Besides, the channel thickness causes a serious problem in the threshold voltage variation. The proper selection of the channel thickness is yields better performance in the dual-channel technology. If the fixed voltage of the bottom gate is reduced, the carrier concentration of the backchannel get reduces, which also reduces the required front gate voltage to completely deplete charge carriers in the backchannel. This effect is predicted in Fig. 4 a and b, the back gate bias at V bg = −0.1 V requires more negative front gate bias to deplete the charge carriers in the backchannel but it is comparatively low The expression (16) indicates that the total charge carrier concentrations of the channel depends on both variable front gate voltage and fixed back gate voltage but the threshold voltage varies concerning the carrier concentration of both channel. Therefore, the backchannel has less threshold voltage than the front channel, for which the back gate bias is fixed less than the variable front gate voltage.
The front channel electron density ns1 for three different δ doping (3 × 10 12 ,2 × 10 12 ,1 × 10 12 cm −2 ) and back channel electron density for two different δ doping (3 × 10 12 ,2 × 10 12 cm −2 ) with three different back gate voltages (−0.1, −0.2, According to the solution given in eq. (14). After the front channel reaches the subthreshold region, the carrier density in the quantum well increases with the accumulation of electrons from the top barrier layer also depleted electrons from the backchannel. Therefore, the single gate takes control of both channels in the Asymmetric Silicon substrate DG-HEMT. Further, the electrons accumulation depends on the barrier width. If the device has a larger barrier width, it increases the distance between the channel and the gate foot causes the reduction in electrons in the quasi-fermi level, this was explained in the previous section. The subthreshold voltage also varies with the channel thickness and the interface charges of 2DEG.
In the Asymmetric DG-HEMTs, the doping is done on both sides of the channel (InSb) with the AlInSb barrier layer to enhance the accumulation of electrons in the quantum well. Therefore, doping profile analysis is an unavoidable important parameter in the density of carrier concentration calculation on both the top and bottom of the two-dimensional electron gas. The top barrier doping profile was explained in Fig. 5(a) and the bottom barrier doping profile analysis is shown in Fig.  5(b). The graph clearly shows the larger delta doping profile with the same back gate voltage produces high carrier density on back channel. Also, the larger doping profile shifts the entire plot to the left side, which indicates that the variation of threshold voltage with delta doping. Further, the electron concentration drop on the channel by decreasing the delta doping in the barrier layer is compensated by surface charge density.
The charge density n s1 , n s2, and total charge density n s relationships are shown in Fig. 6, for two different back-gate voltages (V bg = −0.1 V and V bg = −0.3 V). The graph clearly shows the total carrier density n s follows then n s2 up to the front channel reaches the subthreshold region of the operation. When the top channel enters into the subthreshold region, the total carrier density n s variation depends on both the top and bottom of carrier concentration (n s ). In addition, the plot shows that the top channel reaches the maximum density and it depletes the backchannel carrier concentration due to modulation effects on the backchannel by front gate bias. But the total carrier density is the function of both the top and bottom carrier density of quantum well. However, the backchannel concentration is the only function of back gate voltage and the density of the charge carriers is saturated and no longer varies for fixed back gate bias. Therefore, the total charge density (ns) variation is only due to the modulation effect in the top channel charge carriers. The function of donor layer thickness (T d ) in the gate to source capacitance along with back gate voltage is shown in Fig. 7. The thick donor layer (5 nm) shows the low gate to source capacitance but it led to more negative voltage needed to deplete the quantum well formulated under the donor layer. As mentioned in Fig. 2, the distance between the gate foot and the quantum well is increased, the gate loses control over the channel.
The frequency variation for three different back gate voltages along with front gate voltage (V fg ) is shown in Fig. 8. The cut off frequency (Ft) linearly increasing by increasing the biasing voltage on the back gate from negative and reaches the maximum of operation speed and get reduces with increasing front gate biasing voltage. These effects were observed because of modulation in the transconductance and gate to source capacitance when increasing voltage in the front gate beyond the limit of saturation. So, understanding of transconductance relationship with front and back gate voltages is an unavoidable analysis and it is shown in Fig. 9.
It is observed that the transconductance is increasing along with back gate voltage with constant front gate bias and reaches the maximum, further increasing bias at the back gate it starts to degreases. Also, increasing front gate bias could achieve high total transconductance. Because the front gate controls the total transconductance of the device.
The drain current for three different back gate biases with front gate voltage is shown in Fig. 10. The plot clearly shows that the back gate bias varies the threshold voltage because the backchannel concentration is a function of the back gate voltage. The variable threshold voltage achieved by modulating   Figure 11 shows the drain current variations versus drain to source voltage for different front gate voltages. The drain current results are developed according to eq. (27) by considering both the channels. The carrier concentration of the channel or drain current approaches zero at which the threshold voltage is calculated for the Asymmetric DG-HEMT. The drain current for various front gate biases compared with sentaurus TCAD simulation results.

Conclusion
A compact model has been developed to predict the sheet charge density and small signal intrinsic parameters for Asymmetric Silicon substrate DG-HEMT. The sheet charge density (n s ) is calculated by comparing the quasi-fermi energy level to the back channel modulation effects caused by various front gate biases. Various parameters such as back gate bias, doping concentration, barrier, and InSb channel thickness were used to study the variation of carrier concentration on dual channels. The influence of the carrier concentration modification on the threshold voltage is also investigated and components with variable threshold voltage are used in highfrequency mixed-mode circuits. The proposed small signal model is used to determine the Gate to Source Capacitance and Cut Off frequency as a function of dual channels, and the Cut Off frequency was found to be around 197 GHz for V bg = 0.3 V. For V fg = 0.2 V, the transconductance of the dual channel is also around 2390 Sm/mm. Furthermore, the model parameters are expanded to develop the drain current characteristics of Asymmetric Silicon wafer DG-HEMTs. The drain current analytical results are validated and compared to the sentaurus 3-D TCAD results. The simulation results are very close to the charge control model's obtained results.
Availability of Data and Material There are no linked research data sets for this submission. The following reason is given: No data was used for the research described in the article.
Code Availability Not Applicable.
Author's Contributions Author 1 (T.Venish Kumar): Conceived and design the analysis, contributed data,analysis tools, and wrote the paper. Funding The authors of the manuscript did not receive any funding, grants, or in-kind support in support of the research or the preparation of the manuscript.

Consent for Publication Yes
Conflict of Interest All authors have participated in (a) conception and design, or analysis and interpretation of the data; (b) drafting the article or revising it critically for important intellectual content; and (c) approval of the final version. This manuscript has not been submitted to, nor is under review at, another journal or other publishing venue. The authors have no affiliation with any organization with a direct orindirect financial interest in the subject matter discussed in the manuscript.
Authorship Confirmation • All authors have participated in (a) conception and design, or analysis and interpretation of the data; (b) drafting the article or revising it critically for important intellectual content; and (c) approval of the final version.
• This manuscript has not been submitted to, nor is under review at, another journal or other publishing venue.
• The authors have no affiliation with any organization with a direct or indirect financial interest in the subject matter discussed in the manuscript • The following authors have affiliations with organizations with a direct or indirect financial interest in the subject matter discussed in the manuscript.