Reconfigurable Multifunctional Ambipolar Polymer Transistors with Improved Switching-off Capability Upon Non-Uniformly Distributed Compensation Potential

Ambipolar field-effect transistors allowing both holes and electrons transport can work in different states, which are attractive for simplifying the device manufactures and miniaturizing the integrated circuits. However, conventional ambipolar transistors intrinsically suffer from poor switching-off capability because the gate electrode is not able to simultaneously deplete holes and electrons across the entire transport channel. Here, we show that the switching-off capability of polymer ambipolar transistor is largely improved by up to 3 orders, through introducing non-uniformly distributed compensation potentials along the channel to synchronically tune the charge transport at different channel locations. Non-uniformly gate-stressed conjugated-polymer@insulator blend film induces non-uniformly trapped charges in the insulators, which consequently generates non-uniform compensation electrical field imposed in the conjugated-polymers. Both n-type and p-type operations with high mobility (2.2 and 0.8 cm 2 s -1 V -1 respectively) and high on/off ratio (10 5 ) are obtained in the same device, and the device states are reversibly switchable, which provides a new strategy for three-level non-volatile memories and artificial synapses. & V D = -60 V) processes. d Schematic illustration of the ambipolar transistor with trapped charges in electret for artificial synapse. e EPSC generated by -100 V pre-synapse pulse with variety of pulse widths for potentiation. f EPSC generated by 80 V pre-synapse pulse with variety of pulse widths for depression. g Pulse width dependent ΔEPSC and ΔIPSC, extracted from e and f . h PPF (= ( A 2 - A 1 )/ A 1 ) as a function of the pulse interval time (Δ t ). i EPSC and the decay characteristics after the stimulation of 1, 10 and 50 pre-synapse gate pulse (-80 V, T p = 0.1 s and Δ t = 0.1 s). j PSC during 50 excitatory and 50 inhibitory spiking pulses for LTP and LTD. The PSC was extracted from the peak value of the post-synaptic current after each pulse.


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shaped transfer characteristics especially when the drain voltage is relatively high. The inconspicuous off-state and low on/off ratio are unfavorable for the design of CMOS-like logic circuits 24 . Several methods aiming at either modifying the ambipolar materials or optimizing the device structures were proposed to promote the applications of ambipolar materials for high performance transistors and CMOS-like circuits, and among them are two representative examples: 1) Converting ambipolar to unipolar (p-type or n-type) during device fabrication or post-processing to improve the off-state. Particularly, contact engineering, chemical doping and modification of dielectrics are adopted to suppress the ambipolar transport [25][26][27][28][29][30][31] , which sacrifice the multifunctional operation characteristics of ambipolar transistors. 2) Suppressing the injection and accumulation of electrons (holes) from the drain electrodes in p-type (n-type) working mode through modified device construction and additional control signals to gain a high on/off ratio. In this case, additional electrodes and control signals are necessary to separately control the charge accumulation or depletion in different channel locations 2,3,28,32-35 , which complicate the fabrication process and weaken the compatibility with the conventional three terminal devices as well as their integrated circuits. Therefore, so far, the state-of-the-art approaches based on the optimizations of materials and device constructions do not reversibly and continuously tune the ambipolar performance satisfactorily especially after the complete fabrication of the device, though the tunability would be crucial for non-volatile memories and artificial synapses.
Actually, besides additional electrodes, any methods (e.g. polarized ferroelectrics and charged electrets) which can provide gradually varied compensation potential to the channel can eliminate the asymmetric potential along the channel under certain gate and drain voltages [36][37][38][39] . Therefore, appropriate gate voltage and external compensation potential can be designed to prevent the injection and accumulation of neither holes nor electrons to obtain an off-state with low current (Fig. 1b). In addition, with a gradually varied compensation potential, holes or electrons could be approximately synchronically and symmetrically accumulated along the channel when the gate voltage deviates slightly from the off-state (Fig. 1b) 36 .
Taking the above considerations into account, in this work we demonstrate an easilyaccessible post treatment to reversibly manipulate the operation of ambipolar transistors upon non-uniformly gate-stressed conjugated-polymer@insulator blends. The switching-off capability is thus improved by 3 orders. The non-uniform gate stress induces non-uniform compensation potential, which effectively tunes the off-state current and consequently contributes to diverse device characteristics and multiple functions, such as ambipolar transistors with reconfigurable on/off ratio, CMOS-like inverters, multi-level non-volatile memories and artificial synapses. Insulator dominated (90%) conjugated-polymer@insulator blend films are used for both charge transport and charge trapping, where the continuous conjugated-polymer networks serve as high-quality transport pathways, and the insulatormatrix could trap holes or electrons acting as electret to provide a built-in compensation electric field to tune the device performance. Both p-type and n-type operations with high on/off ratio (10 5 ) under high drain voltage are realized in the same ambipolar transistor after the injection of non-uniformly distributed charges into the electrets, and the device states are reversibly switchable. The uniformly and non-uniformly trapped charges leading to different device states provide a new strategy for multi-level non-volatile memories. Three states for both p-type and n-type operation with current ratios of 10 2 , 10 3 and 10 5 to each other are obtained with the retention time exceeding 10 4 s. Furthermore, the non-uniform charge trapping in these reconfigurable ambipolar transistors is applicable for emulating the biological synapses. Both holes and electrons could serve as neurotransmitters to be reversibly injected and trapped in the electret to modulate the drain current representing the variation of post-synaptic signals 5,14,40 .
Compared with the conventional synaptic devices fabricated by unipolar materials, there is no need to prepare the off (on) state in this ambipolar synaptic transistor in advance for the subsequent excitation (inhibition) response, which is of great significance for realizing realtime adjustment of synaptic activity 41 .

Results
Simulated characteristics of ambipolar transistors with compensation potential. As shown in Fig. 1c, for the conventional ambipolar transistor under a high drain voltage (-60 V), either holes or electrons are accumulated along the whole channel when the gate voltage is highly negative (VG < -60 V) or positive (VG > 0 V), while both holes and electrons are simultaneously accumulated in the channel when the gate voltages are within the range of -60 < VG < 0 V. The pinch-off region for this conventional ambipolar transistor is quite small. However, when a linearly distributed compensation potential (VC (x) = -60x/L, 0 ≤ x ≤ L, L is the channel length) is applied along the channel (Fig. 1d), an obviously wider pinch-off region which are nearly extended through the whole channel appeared as the gate voltage approaches to 0 V, resulting in a quite low off-state current and thus a high on/off ratio of the device. With further increasing the gradient of the compensation potential, the pinch-off region maintains large for a finite gate voltage range (Fig. 1e), which means the low off-state current can be obtained in a larger range of the operation voltages. The corresponding transfer characteristics of the ambipolar transistor with or without compensation potential are shown in Fig. 1f, and with the increase of the gradient of the compensation potential from source to drain, the off-state current can be greatly decreased. Similarly, a linearly varied positive compensation potential along the channel could help suppress the hole current to obtain a high on/off ratio under n-type operation (VD = 60 V) ( Supplementary Fig. 1a). As a comparison, for the ambipolar transistor with uniform compensation potentials along the channel, the tranfer curves only shift to negative or positve voltages with the off-state current unchanged ( Supplementary Fig. 1b, c). In this case, the charge modulations in different channel locations are still not synchronic and the uniform compensation potentials only change the gate voltages for the accumulation or depletion of the charges. However, combining the uniform and non-uniofrm compensation potentials could not only tune the off-state current but also regulate the value of the gate voltages to achieve the off-7 state ( Supplementary Fig. 1d, e), which will increase the controllability of the device operations through applying compensation potentials.
Experimentally, we use a conjugated-polymer@insulator blend film based ambipolar transistor as a prototype to demonstrate the modulation of ambipolar transistors by the nonuniform compensation potential provided by the trapped charges in the insulator electret. A small quantity of conjugated-polymers dispersed in the insulator-matrix could effectively improve the device performance (e.g. mobility and stability) [42][43][44][45][46] , and more importantly, the insulator-matrix could help store charges and enhance the stability of stored charges for long time retention. The stored charges in the insulator-matrix could change the local potential of the channel, which is equivalent to the compensation potential applied to the channel. The local potential generated by the stored charges in the insulator-matrix is proportional to the charge density, i.e. VC (x) = QC(x)/Ci, where QC(x) is the density of stored charges at position x and Ci is the capacity per unit area of the dielectric layer. The charges are pre-injected into the insulator-matrix by gate-stress, and through adjusting the gate and drain voltages, the distribution of the injected charges could be modulated to generate different compensation potential profiles along the channel to realize different final device performance. The charge trapping and de-trapping in the insulator-matrix is switchable and reversible, which enables to erase the previous state and reprogram the device for another state 39 . Moreover, as there are traps for both holes and electrons leading to threshold voltages for the accumulation of mobile charges, the actual pinch-off region of the ambipolar transistor is wider than that shown in Fig.   1c and smaller compensation potentials could effectively lower the off-state current. To explore what changed the device performance when blending the conjugated-polymer with PS, UV-vis spectroscopy, grazing incidence wide-angle X-ray scattering (GIWAXS) and atomic force microscope (AFM) were used to characterize the morphology and microstructure of the blend film as well as the pure conjugated-polymer film. Figure 2e shows the absorbance of PDPP-4FTVT and PDPP-4FTVT10%@PS films. For PDPP-4FTVT, there are two absorption peaks at 833 and 743 nm, corresponding to the 0-0 and 0-1 vibrational transitions. For a qualitative analysis, the absorbance was normalized at the 0-1 peak. By comparison, we find that the 0-0 peak shows a higher intensity value and the peak position shifts to a larger wavelength after blending with PS. This phenomenon has been observed in several conjugatedpolymer and insulator blends, which demonstrates increased aggregation and ordering of 9 conjugated-polymers in the insulator-matrix 42,43,[49][50][51][52][53][54] . The dashed lines in Fig. 2e are the absorbance of PDPP-4FTVT10%@PS film after different time periods of oxygen plasma etching.
The absorbance at 195 (A195) and 836 nm (A836) was mainly contributed by the absorption PS and PDPP-4FTVT respectively, which was extracted to reveal the distribution of the two components in the vertical direction of the blend film 55 . As shown in Fig. 2f, A195 and A836 decayed at a similar rate and the ratio of them (A836/A195) slightly changed with the increase of etching time, except for the top and bottom interface, demonstrating that no obvious vertical phase separations of conjugated-polymers and insulators occurred in the blend film 55 . In addition, GIWAXS, as a well-established protocol for characterizing the crystalline structure of polymers, was used to characterize the nanostructure change of the conjugate-polymer films 56,57 . Figure 2g shows the 2D GIWAXS patterns as well as the 1D integrated curves, where strong (h00) signal was observed in the out-of-plane direction while only weak (010) signal was observed in the in-plane direction. Based on the diffraction signal, we conclude that edge-on lamellar crystal dominated in the pure PDPP-4FTVT film. By comparison, the PDPP-4FTVT10%@PS film show a weaker (h00) signal than that of pure PDPP-4FTVT film. In addition, a broad halo attributing to the diffraction signal of amorphous PS was also observed in PDPP-4FTVT10%@PS film (Fig. 2g). The weaker diffraction signal in the blend film indicates that the crystallinity of conjugated-polymer has decreased 42 , which can be rationalized by the fact that PS distorted the formation of the long-range ordered crystalline structure in PDPP-4FTVT. Nevertheless, the short-range intermolecular aggregation of the conjugatedpolymer chains was not weakened, but increased due to the confinement effect of inert PS matrix according to the vibrational transitions peaks 43,53,58 . AFM height images (Fig. 2h) exhibit that the surfaces of both pure and blend film were smooth, while the phase images illustrate that the fiber like morphology which attribute to the aggregation of conjugated-polymer chains was formed in the blend film, similar to the reported results of conjugated-polymer and insulator blends 42,43,49 . Thus, according to UV-vis spectroscopy, GIWAXS and AFM results, the PDPP-4FTVT chains which extended along the backbone direction form fiber like continuous network with enhanced local aggregation embedded in the amorphous PS matrix. This unique network of conjugated-polymer chains enables high-quality pathways for charge transport, and the insulator-matrix could trap charge acting as electret to modulate the device performance.
Another conjugated-polymer P2F 59 was studied with the same methods, and the device performance as well as the morphology/microstructure varied with similar tendency to PDPP-4FTVT after blended with PS, except that the hole mobility is higher than the electron mobility for all of the transistors with different ratios of P2F in the active layers (Supplementary Fig. 3 and 4).

Modulating the operation of ambipolar transistors by non-uniformly distributed electret
charges. To modulate the performance (especially the on/off ratio) of the ambipolar transistors, holes or electrons are injected into the insulator-matrix under both gate and drain voltages to induce uniformly or non-uniformly distributed electret charges along the channel, which provide the built-in compensation field to alter the channel potential. This procedure is regarded as a programming operation to the transistor with the conventional construction. Compared to other reconfigurable transistors with additional electrodes, this method avoids the complicated manufacturing process, and maintains good compatibility with traditional devices and circuits.
In the programming process, the gate and drain voltages were adjusted to obtain different final performance. The charge injection procedure was processed at 130 o C to realize efficient injection. The transfer characteristics of PDPP-4FTVT10%@PS and P2F10%@PS transistors measured at 130 o C are shown in Supplementary Fig. 5. A large butterfly-shaped hysteresis appeared in the drain current profile with the scan of the gate voltages, which is a typical feature of charge trapping 9,10,40,60 . Both positive and negative shifts of the transfer curves were observed, which means both electrons and holes could be injected and trapped in the insulators at high temperatures 10 . However, charge trapping under high temperature is un-abiding, because the trapped charges will quickly release when the voltages are removed at high temperature, and the transistor performance would recover to its initial states after cooling to low temperature.
To obtain stably trapped charges, the gate and drain voltages were kept as the temperature dropped from 130 o C to below 40 o C. In this case, some of the charges injected at high temperature could be stably trapped at low temperatures, which guarantees reliable electrets to modulate the transistor performance 36,61 . We firstly investigated the device performance after introducing uniformly trapped charges along the channel, which was realized by stressing the ambipolar transistor with a high gate voltage as well as the source and drain grounded (VS = VD = 0 V). As shown in Supplementary Fig. 6, introducing uniformly trapped charges only shifted the transfer curves to positive or negative voltages, and the current on/off ratios were almost unchanged. The transfer curve shifts were originated from the trapped charges in the insulatormatrix, which modulated the accumulation and depletion of mobile charges by the electrostatic interaction 14,55 . Stressing the transistor with positive gate voltages could inject electrons into the insulator-matrix and the trapped electrons will enhance the accumulation of holes while suppress the accumulation of electrons, which shifted the transfer curves to positive voltages.
The results turned to the opposite when stressing the transistor with negative gate voltages to inject and trap holes in the insulator-matrix.
To improve the device performance with a high on/off ratio, the trapped charges should be non-uniformly distributed along the channel to generate a gradually varied compensation potential to suppress the unwanted current in the off-state. For n-type operation, holes should be injected and mainly trapped in the vicinity of drain electrodes, which suppress the injection of holes and enhance the injection and accumulation of electrons from the drain. In this case, the on-state current increases and the off-state current decreases, which leads to a remarkable increase of the on/off ratio. As shown in Fig. 3a, b, holes were injected by the bias stress of VG Fig. 3a). Under such a voltage setting, the potential difference between gate and drain (ΔVGD = -80 V) was much larger than that between gate and source 12 (ΔVGS = -20 V), and thus more holes were injected from the drain and trapped in the insulatormatrix in the vicinity of drain electrodes after cooling the device to low temperature 36 . After such a post treatment of bias stress to the ambipolar transistor, the on-state current increased and the off-state shifted to the region of around VG = 0 V with low current (~ 10 -9 A). Thus, the current on/off ratio significantly increased from 10 2 to 10 5 . Similarly, to optimize the p-type performance of the ambipolar transistors, electrons were injected and trapped in insulatormatrix by the opposite voltage setting (VG = 20 V & VD = -60 V), and the current on/off ratio also increased to 10 5 (Fig. 3c). The field-effect mobility extracted from the slope of |ID| 0.5 vs VG plots was not notably changed before and after the programming processes for both n-type and p-type operation (Fig. 3b, d), and the obtained µe and µh are 2.2 and 0.8 cm 2 s -1 V -1 , respectively.
The output characteristics in the scanning voltages show no ambipolar current ( Supplementary   Fig. 7), which is coincident with the transfer curves. Note that for brevity, Figure 3 only shows the transfer curves for the single forward scanning, and the reciprocated and repeated scanning of the transfer curves before and after programming operations are shown in Supplementary   Fig. 8. The hysteresis of the transfer curves is not significant and the on/off ratio could be maintained after dozens of scanning cycles, which illustrates that the injected charges were stably trapped and could persistently modulate the device performance. The shape of the transfer curves could be further modulated through controlling the distribution of the trapped charges along the channel by changing the voltage settings in the programming process. As shown in Fig. 3e, f, stressing the ambipolar transistor by VG = 10 V & VD = -80, led to a wider off-state (~ 20 V) in the transfer curve, which was derived from the increased potential difference between source and drain in the bias stress, causing steeper gradient of the trapped charges along the channel. We can conclude that the more uniform the trapped charges are, the less helpful for improving the current on/off ratio (e.g. Supplementary Fig. 6), while the more dramatic increase of the trapped charges along the channel from source to drain is, the more favorable for obtaining a wide off-state with low current. In addition to the distribution gradient 13 of the trapped charge in the channel, the total quantity of the trapped charges also appreciably impacts the shape of transfer curves. As shown in Fig. 3g, h, the electrons were injected by VG The transfer curve shifted more to positive gate voltages while the width of off-state (~ 10 V) was not changed as compared with that in Fig. 3c. This is because the potential difference between source and drain is same with that in Fig. 3c, leading to the same gradient of trapped charges along the channel. However, the increased gate potential injected more electrons along all the channel causing the wider shift of the transfer curves to positive gate voltages. More simply, the programmed transfer curve in Fig. 3g can be regarded as that in Fig. 3c superimposing the uniformly distributed compensation potential along the channel, leading to the overall shifts of the transfer curve to positive gate voltages ( Supplementary Fig.   1d, e). Therefore, through controlling the quantity and distribution of the trapped charges along the channel, the threshold voltages and the on-/off-states of the ambipolar transistors could be regulated in this work 62 .
The transistors based on pure PDPP-4FTVT and pure P2F films show similar tendency of on/off ratio increase after non-uniform charge injection ( Supplementary Fig. 10), which might be resulted from the trapped charges at the semiconductor/dielectric interface under biases 63 .
However, the quantity of the trapped charges was smaller and the charges dissipated more easily, leading to the much inferior variation range of the on/off ratio and poor retention characteristics.
To demonstrate the universal applicability of this method for ambipolar transistors, p-type and n-type semiconductors stacked bi-layer ambipolar transistors were studied ( Supplementary Fig.   11), in which holes and electrons accumulate/transport in different layers 20,63 . Whether the transport channel is adjacent to or isolated from the electret layer, the non-uniformly injected charges can significantly reduce the off-state current and improve the on/off ratio. Similarly, a graded-potential gate realized by a high-resistance conductive layer within two terminal electrodes was proposed to continuously modulate the channel potential of graphene transistors, 14 and the electron or hole transport branch of the device could be suppressed to convert ambipolar to unipolar under an appropriate graded-potential 35 . However, due to the zero bandgap of graphene, the on/off ratio did not increase.
It's worth noting that the opposite charge transport (holes for Fig. 3a and electrons for Fig.   3c, e and g) in the programmed transistors increased dramatically when the gate voltage deviated from the off-state. This means the ambipolarity was maintained in these devices and the intrinsic properties of the opposite charge transport (especially for mobility) were not degenerated in the programming process, which is significant to reprogram the transistor for another state and to reversibly switch the transistor operations for memories (show later). We reviewed the organic materials based ambipolar transistors reported in recent five years, and counted the average electron and hole mobility (µ = (µp×µn) 0.5 ) and on/off ratios for the transistors with nearly balanced electron and hole mobility (1 < µp/µn < 5 or 1 < µn/µp < 5) under relatively high drain voltage ( Fig. 3i and Supplementary Table 1). The on/off ratio of our reconfigurable ambipolar transistors with high mobility are tunable and the programmed high on/off ratio (10 5 ) is remarkable in those high mobility (µ ≥ 1 cm 2 s -1 V -1 ) transistors.
Manipulating the characteristics of single ambipolar transistor is meaningful for improving the performance of logic circuits. Building CMOS-like logics by ambipolar transistors is attractive because the complicated process of preparing p-and n-type transistors could be simplified 24 . We demonstrate the programmed ambipolar transistors for CMOS-like inverters (Fig. 3j). The voltage transfer characteristics (Fig. 3k) and the signal gain (dVout/dVin) (Fig. 3l) were optimized when the two transistors were p-and n-programmed respectively due to the improved on/off ratio and subthreshold swing of the single transistor. However, because the opposite charge transport was not completely suppressed to converter the ambipolar transistor to typical p-or n-type unipolar transistors, the voltage transfer characteristics of the inverter were not fully swing from 0 to VDD.

Uniformly and non-uniformly distributed electret charges in ambipolar transistors for
multi-level non-volatile memories and artificial synapses. Injecting holes or electrons into polymer electrets to shift the transfer curves can be used to realize memory applications 64 .
However, for unipolar transistors, usually only one type of charges could be injected into and trapped in electret, so that the transfer curves can only be unidirectionally shifted, and cannot return to the original state even as the opposite voltage is applied 55,65,66 . In ambipolar transistors, both holes and electrons could be reversibly trapped and released, which is favorable for reversibly switch the device states for realizing flash-type memories 10 . However, uniformly trapped holes or electrons along the channel just shift the transfer curves to negative or positive voltages, and the remained high off-state current lead to low memory ratios 67 . We demonstrate a three-level non-volatile memory based on uniformly and non-uniformly trapped electret charges in the ambipolar transistor. As shown in Fig. 4a, for p-type operation with high drain voltage (VD = -60 V), the drain current is in high level at VG = -5 V due to the strong electron transport (defined as logic "0" state). Introducing uniformly trapped electrons could shift the transfer curves to positive voltages, and the minimum current state shifts to VG = -5 V, which is defined as the programmed logic "1" state. The current ratio of state "0" and "1" exceeds 10 2 .
Suppressing the transport of electrons by introducing non-uniformly trapped electrons in the insulator-matrix could further lower the off-state current at VG = -5 V, which is defined as the programmed logic "2" state. The current ratios of state "2" to state "0" and "1" are 10 5 and 10 3 , respectively. In addition, the device could be reset to its initial state after a symmetrical negative gate stress excluding the trapped electrons in the insulator-matrix, no matter whether they were uniformly or non-uniformly trapped along the channel previously. As the ambipolar transport is maintained after the programming process, similar programming processes could be implemented to n-type operation by injecting holes into the insulator-matrix through symmetrical or asymmetrical negative bias stress (Fig. 4b), and the current ratios between state "0", "1" and "2" are 10 2 , 10 3 and 10 5 respectively. Although holes and electrons could be reversibly injected into and trapped in the insulator-matrix under higher temperature to let the device work in different states, the trapped holes or electrons are stable and the different memory states can be maintained for more than 10 4 s at room temperature, as shown in Fig. 4c.
Based on charge trapping in the insulator-matrix, we demonstrate the ambipolar transistors for artificial synapses with the function to process information transmission and memory simultaneously. Synapse refers to a structure in which the impulse of one neuron is transmitted to another neuron or to another cell. When the nerve impulses are transmitted to the synaptosomes through the axon, the presynaptic membrane releases neurotransmitters to the synaptic cleft, and the neurotransmitters diffuse to the post-synaptic membrane and bind to protein receptors, causing excitatory or inhibitory changes in the post-synaptic membrane ( Fig.   4d) 14,40,68 . The function of synapse could be emulated in ambipolar transistor with electret, where holes or electrons serving as the transmitters could be trapped in the electret under the gate pulse to convert the gate pulse carried signals into the change of drain current (Fig. 4d) 14 .
In this synaptic transistor, reading the post-synaptic current at drain and applying the spike pulse at gate electrode are implemented simultaneously, which enables to concurrently perform the signal transmission and self-learning processes. As the drain voltage and gate voltage are applied simultaneously during the pulse, the charges are non-uniformly injected and trapped in the insulator-matrix. The drain current is sensitive to the non-uniformly trapped charges at VG = 0 V, because which could effectively tune the off-state current as demonstrated in Fig. 3 Fig. 12a, b and c). Therefore, higher pulse voltage and longer pulse duration can result in considerable trapped charges in the electret to effectively change the postsynaptic current, and some of charges trapped in the deep energy level would maintain for longer time. As shown in Supplementary Fig. 12d, the EPSC induced by -100 V pulse for 1 s can remain potentiation for more than 10 3 s. The EPSC is fitted into a double exponential function, as it rapidly decreases at first and then slowly decay with time, which is resulted from the rapid release of the shallowly trapped charges once the pulse end, and the deeply trapped charges slowly release from the electret. By contrast, when the transistor based on pure PDPP-4FTVT film is used for synapse, the EPSC after the same spiking pulse is much inferior, and quickly returns to the original value exhibiting poor retention characteristics ( Supplementary   Fig. 12e). As both holes and electrons could be injected into and trapped in the electret by the gate voltages to modulate the drain current for different levels, there is no need to prepare the off (on) state for the subsequent excitation (inhibition) response in advance. That means, for the device discussed above, electrons could be injected into and trapped in the electret to induce a decreased post-synaptic current for realizing suppression firstly ( Supplementary Fig. 12f), and especially for high drain voltages, the electron current of the transistor is in high level and positive pulse spikes could effective lower it ( Supplementary Fig. 12g, h).  Supplementary Fig. 12i, and the values are relatively small and less Δt dependent than the PPF, because the trapped holes are easily released during the first pulse. STP will transform to long-term plasticity (LTP) with permanent change in synaptic behaviors after repeated stimulations 5 . The retention characteristics of EPSC reflect the memory effect of the synaptic transistors, including short-term memory (STM) and long-term memory (LTM) 14 . As shown in Fig. 4i, the EPSC after a single short pulse stimulus is much lower and quickly decays to the original state, which is analogous to the STM of brain after a transient and mild stimulation.
The STM transforms to LTM when the stimulations are persistent or repeated, as the EPSC is substantially enhanced after 10 or 50 consecutive identical pulses and retains for longer time at high values. Long-term potentiation and depression (LTP, LTD) are also accomplished in the synaptic transistor, which is useful features for neuromorphic computing 17,40,68 . Figure

Discussion
In conclusion, taking two model ambipolar polymer field-effect transistors as examples, we demonstrate modulating the on/off ratio of ambipolar transistors for multiple functions through introducing uniformly and non-uniformly distributed compensation potential along the transport channel. The compensation potential is experimentally generated by uniform or nonuniformly distributed electret charges, which are symmetrically or asymmetrically injected into the insulator electrets through adjusting the gate and drain voltages. The off-state current can be effectively decreased by up to 3 orders after injecting non-uniformly distributed charges into the electret. Both n-type and p-type operations with high on/off ratio (10 5 where VS and VD are the electric potentials applied to the source and drain electrode, ID is the current in the channel, e is the elemental charge, x is the distance from the source, L and W are the channel length and channel width of the transistor, µ is the carrier mobility (µe for electrons 22 and µp for holes) and P(x) is the areal carrier density (both holes and electrons for our ambipolar device) in the channel at the position x, which can be derived from the plate capacitor model as, 36 where V(x) is the electric potential at the position x in the channel, VG is the gate voltage and Ci is the capacity per unit area of the dielectric layer, For our simulation, we have L = 0.3 mm, W = 3 mm, µp =0.7 cm 2 s -1 V -1 , µe =1.8 cm 2 s -1 V -1 , Ci = 11.5 nF cm -2 .
We solved equations (1) and (2) numerically to obtain the transfer characteristics of the device.
For simulating the ambipolar transistors with a compensation potential VC(x), Experimentally, the compensation potential V(x) was provided by the stored charges in the insulator electrets, and the local potential generated by the stored charges in insulator-matrix is proportional to the charge density, i.e. VC (x) = QC(x)/Ci, where QC(x) is the density of stored charges per unit area. Therefore, equation (3) is transformed to Note that to avoid the presence of P(x) = 0 positions along the channel which would diverge the integrand in equations (1) and (2), (3) or (4), we define a small voltage value Va = 0.03 V such that the carrier density was set to be CiVa when the P(x) is smaller than CiVa. The insets of a, c, e and g are the schematics of injecting holes or electrons into the insulatormatrix by gate and drain voltages, and the red arrows are the electric fields perpendicular to the film thickness direction. i Statistics of the average electron and hole mobility (µ=(µp×µn) 0.5 ) and on/off ratio of organic ambipolar transistors with nearly balanced electron and hole mobility (1 ≤ µp/µn < 5 or 1 ≤ µn/µp < 5) under relatively high drain voltage reported in recent five years. j Schematic of CMOS-like inverter based on n-programed (n-pro) and p-programed (p-pro) ambipolar transistors. k Voltage transfer characteristics and l corresponding gain (|dVout/dVin|) of the inverter.