Chip on a ber toward the e-textile computing platform

Electronic textiles have been considered one of the desired device platforms due to their dimensional compatibility with fabrics by weaving them with yarn. However, the existing electronic textile platforms are generally composed of only one type of electronic component with a single function on a ber substrate because of processing challenges. A precise connecting process between each electronic ber is essential to congure the desired electronic circuits or systems. Here we present a chip on a ber, a new electronic ber platform, by introducing large scale integration of electronic device or circuit components onto a one-dimensional microber substrate. The electronic components such as transistors, inverters, ring oscillators, and thermocouples were integrated together onto the outer surface of a ber substrate with precise semiconductor and electrode patterns. Our results show that the electronic components can be integrated on a single ber with reliable operation. We evaluate the electronic properties of the chip on a ber as a multifunctional electronic textile platform by testing their switching and data processing, as well as sensing or transducing units for detecting optical/thermal signals. The demonstration of the chip on a ber suggests signicant proof of concepts for realization of high performance with wearable electronic textile systems.

considered a bottleneck for further development. Second, the areal density of the device should be increased by introducing a speci cally designed architecture or process 16 . In this point of view, it is highly necessary to develop compact and miniaturized electronic systems that are capable of working on a single ber. Nevertheless, to date, a new strategy on the fabrication of a high-density electronic ber possessing multiple electronic components and circuits as well as maintaining excellent electrical performance under mechanical strain has not yet been reported.
In this work, we present a new electronic ber platform that enables large scale integration (LSI) of electronic device components on the surface of a 1D ber substrate with a diameter of 150 μm (see Fig.   1A). By using high-resolution maskless photolithography with a capillary tube assisted coating method 17 , multiple miniaturized device units are integrated onto a very narrow and thin ber surface. As a proof-ofconcept demonstration, basic electronic devices ( eld-effect transistors, inverters, and ring oscillators) and sensors (photodetectors, signal transducers, and distributed temperature sensors consisting of thermocouples) are fabricated onto the two different sides of the rectangular ber, respectively. The chip on a ber exhibits various electronic functions (UV detection and switching electrical signals in a single transistor, symmetric input/output behavior in the n-type inverter, oscillation characteristics of 5-stage ring oscillator) and thermal sensing performance with high mechanical stability. We believe that our approach is one of the big steps necessary to implement high-density electronic ber platforms for wearable electronic textiles.
The integrated circuit on a ber system, illustrated in Figs. 1A and B, consists of two different electronic parts: basic optoelectronic elements and a temperature sensor. A square-shaped micro ber made of fused silica was employed as a transparent and exible substrate because the cuboid shape includes six planar faces in three axes, enabling higher integrated density. A transistor, a capacitor, an inverter, and a ring oscillator based on an indium gallium zinc oxide (IGZO) metal oxide semiconductor are placed on the top surface of the ber while the temperature sensor is built onto the side of the ber. To demonstrate the whole device, we exploited both a capillary tube-assisted coating (CTAC) method and high-resolution maskless photolithography, which are able to fabricate precisely patterned metal electrodes onto the thin and narrow mono lament ber substrate 17,18 . The CTAC process has the potential to be compatible with a reel-to-reel coating process, which is an e cient way to minimize material waste and allows ne control of photoresist (PR) lm thickness and uniformity by adjusting the coating speed and solution concentration 17 . Cross-sectional scanning electron microscope (SEM) images indicate that the CTACprocessed PR lm uniformly covered the entire outer surface of the ber, and the thickness of the PR layer is estimated to be approximately 2 μm (Supplementary Figure S1). After coating and baking the PR lm on the ber, a laser pattern generator was employed to quickly expose the PR layer along with the electrode pattern ( Supplementary Fig. S1). The maskless lithography directly transfers the design patterns onto the ber substrate without utilizing a photomask, and enables sophisticated electrode patterning for the fabrication of various electronic ber devices, as shown in Supplementary Fig. S2 18 .
Experimental details (the deposition of metal thin lms and wet-etching through the photolithography) and the electrode patterns formed on the ber are also described in Supplementary Fig. S3. Figures 1C  and 1D show a SEM image and a photograph of the entire device fabricated on the exible ber substrate.
Optical microscopic images and circuit diagrams of each electrical device are shown in Figures 2A and   2D, respectively. A eld-effect transistor (FET), a basic device element, in top-gate and bottom-contact (TG/BC) structure was fabricated to verify the capabilities of the miniaturized devices for electronic ber applications. IGZO and Al 2 O 3 are used as an amorphous oxide semiconductor and a gate dielectric, respectively. Their chemical composition was analyzed with X-ray photoelectron spectroscopy (XPS), and the dielectric capacitance of the 15-nm-thick Al 2 O 3 layer was measured as 180 nF cm -2 , as described in Supplementary Fig. S4. Figure 2B shows the transfer characteristics of the driver FET in the depletionload n-type metal-oxide-semiconductor (n-MOS) inverter. The IGZO-based FET exhibits eld-effect mobility of 5.5 cm 2 V -1 s -1 in the saturation regime with negligible hysteresis and an On/Off current ratio greater than 10 7 at a gate-source voltage (V G ) of 5 V and a low drain-source voltage (V D ) of 5 V. These values are similar to that of previously reported IGZO-based FETs, indicating good reproducibility and validity of this fabrication process for chip on a ber applications 19−22 .
Based on the IGZO FETs, the electrical characteristics of both an inverter and a ve-stage ring oscillator on the ber substrate were evaluated, as shown in Figs. 2C, 2E, and 2F. The depletion-load n-MOS inverter was implemented by a series connection between two n-MOS transistors, which play the role of driver and load, respectively. The source electrode of the load transistor is connected to the gate electrode of the load transistor and the drain electrode of the driver transistor. A channel width (W) of 20 µm and 50 µm with the same channel length (L) of 10 µm for the driver and load components were used, respectively, for the proper balance between the driver and load transistors for the operation of the inverter and the ring oscillator. The voltage transfer curve is measured for a bias voltage (V bias ) of 5 V and supply voltages (V DD ) of 2 V to 5 V. The output voltage-input voltage (V Out -V In ) of the n-MOS depletion load inverter can be seen in Fig. 2C. Subsequently, the ve-stage ring oscillator was prepared by the depletion-load n-MOS inverter having IGZO channels as described above. The ring oscillator is connected in series with ve depletion-load n-MOS inverters. The 1 st inverter output becomes the 2 nd inverter input and the output of the 2 nd inverter becomes the 3 rd inverter input. This chain continues to the 5 th inverter, and nally, the output of the last (5 th ) inverter returns to the input of the primary (1 st ) inverter (See Figure 2D). In this way, integrated circuits (IC) were successfully fabricated using conventional semiconductor processes on a exible mono lament ber substrate. Although a higher process level and optimization for more re nement and accuracy are still required, it will be possible to integrate more complex ICs on the side of facets of rectangular bers or the surface of a cylindrical ber. In addition, the output voltage waveform (V out -time), oscillation frequency (f), and propagation delay (τ) of the ve-stage ring oscillator in according to an increase in power supply voltage (V DD ) are described in Figs. 2E and 2F. The τ of the switching events was determined from tting exponential functions to the measured V out transitions that depend on the supply voltage. On increasing V DD , the τ increased and the f decreased. To test the exibility and stability of the chip on a ber, the IGZO FET device on the ber was measured under both tensile and compressive stress conditions, as can be seen in Figs. 2G and 2H. For systemic analysis of the IGZO FET on the ber under various stress conditions, the electronic ber was placed and xed on exible polyethylene terephthalate (PET) substrates. The electrical parameters such as eld-effect mobility, threshold voltage, and drain current of the IGZO FET on the ber were well maintained for its switching performances up to a compressive strain of 0.64% and a tensile strain of 0.68%, respectively.
Although these mechanical conditions are not fully harsh compared to conventional exible electronic devices, we believe that the chip on a ber platform is still considered as one of the valid approaches for wearable mono lament computing systems.
To explore the possibility of multifunctional device integration on a ber, we monitored the electrical signals of the sensor on a ber against changes of both UV light and temperature. The UV-light and temperature sensors were fabricated on two different sides of the optical ber substrate. The UV sensing test was achieved by monitoring the optoelectrical characteristics of the single IGZO-based FET, enabling switching of the component. Note that the UV detection was carried out by measuring the change of drain current in the FET device. UV-LED light (470-nm) and UV-laser light (404-nm) irradiated toward both the top and bottom of the chip on a ber, implying UV sensing "out of ber" and "through ber core", are shown in Figs. 3A and 3D, respectively. Figure 3B presents the transfer characteristics of the FET on the outer surface of the ber before and after UV exposure (V D = 5 V). As a UV sensing component, the IGZObased FET responded to exposed UV light, and the off-current increased. This implies that exposed light contributes to the generation of charge carriers in the IGZO channel. It should be noted that the irradiated UV light out of ber is partially blocked or scattered by the gate metal electrode due to the TG/BC structure of the FET device. Although the photo-to-dark current ratio is relatively low, it provides enough electrical signal to enable the device to detect UV illumination at unknown environmental conditions (Fig.  3C) Meanwhile, we also found one more possible application as a signal transducer of the IGZO-based FET on the ber. Figure 3D illustrates the schematics of the signal transducer. The UV laser is irradiated through the ber core and is propagated within the single FET fabricated on the optical glass ber. The off-state current in the I D -V G curves remarkably increases by about three orders of magnitude when the IGZO semiconductor is excited by light propagation inside the optical ber (Fig. 3E). The temporal response between the drain current and time (I D -time) with various laser intensities showed a stable switching and relatively high photo-to-dark current ratio, while V D and V G were maintained at 5 V and -5 V, respectively (Fig. 3F). It will be possible to realize a high-performance photosensor or signal transducer by using photosensitive semiconducting materials and different device architectures, such as bottomgate/top-contact device architecture and perpendicular type diodes. In this regard, the IC on optical ber can be utilized not only as a photodetector but also to construct the wireless sensor networks that are powered by laser beam propagation 23 .
Lastly, to allow multifunctionality of the chip on a ber, resistive-type sensors are directly integrated on the other side of the ber, as shown in Fig. 4. For e cient measurement and detection of thermal information, Ni and Cr were selected as the thermoresistive materials because these pure metals can be easily deposited by vacuum thermal evaporation and have high Seebeck coe cients (−19 μV K -1 for Ni and +20 μV K -1 for Cr), which can generate large thermoelectric voltages and signals for temperature monitoring (see Supplementary information). 24 The interval distance between each thermocouple is 3.4 mm and the contact pads of three thermocouples are located on one side of the ber surface. The temperature sensors on a ber operate through voltage changes induced in response to the temperature at different positions along to the ber. Those multiple integrations of sensors on ber enable precise monitoring of temperature at environmental conditions. By setting up the circuit as shown in Fig. 4A and sharing the ground contact, the temperature can be measured at three points simultaneously. Furthermore, the change in thermoelectric voltages (ΔV TE ) with increasing temperature of thermal source (T Source ) and with the temperature difference between thermally synchronized thermocouples is measured at a given temperature and room temperature, respectively (T TC −T RT ). The detailed discussion about each sensor is described in Supplementary Fig. S5.
Due to the unique shape of our chip on a ber, it can be applied as an implantable temperature sensing module as shown in Fig. 4B. To monitor the temperature of the heat source, the integrated sensing ber tip is carefully implanted to a hot block. As a result of thermal conduction from the thermal source to the sensor through the body of the ber, the temperature in a material was successfully monitored spontaneously by changing the temperature of the heat source. The thermoelectric voltages (ΔV TE ) of each thermocouple on the ber were linearly responded by changing the temperature of the heat block from room temperature to 60 °C, exhibiting lower values in order away from the thermal source (T Source > T TC-1 > T TC-2 > T TC-3 ) (Fig. 4C). Although the detected temperature decreased exponentially as the position of the temperature sensor moved away from the heat source due to heat loss from air convection, as shown in Fig. 4D, the calculated temperature at each integrated sensor on the ber exhibited clear stepwise behavior. This implies that the integrated 1D thermoresistive sensors are applicable to not only wearable temperature sensing network systems but also implantable modules. Hence, the above results, together with the UV/thermal sensing and electronic components on a ber, can offer substantial promise for implementation of high performance and multifunctional electronic ber systems for future wearable electronic textile applications.
In summary, we demonstrated an innovative electronic ber platform with integrated electronic devices on a one-dimensional mono lament ber. For high integration density, the capillary-assisted coating method and maskless photolithography were implemented to quickly and directly draw the desired device design in high resolution at ambient conditions. The optimized process presents one way to fabricate miniaturized functional devices onto non-planar substrates. The chip on a ber was composed of basic electronic units such as transistors, inverters, ring oscillators for data processing, as well as sensing or transducing units for detecting optical/thermal signals. The proposed device platform and process provide a new architecting type of brous devices and contribute to the realization of high-density electronic ber embedded in clothes. We envision that this chip on a ber platform will enable new technological advances in wearable electronic textiles as well as conventional batch-process based twodimensional wafer electronics by adapting a reel-to-reel continuous fabrication process.

Material preparation
All materials used in this study were purchased as follows without any puri cation.  Ltd.), and a digital phosphor oscilloscope DPO2002B (Tektronix, Ltd.) in ambient air. The optoelectrical and electrical characteristics of the phototransistor were measured using a Keithley 4200 semiconductor characterization system under illumination of wavelength for 470 nm (UV-LED light of 50mW/cm 2 ). To measure the optoelectrical signal of UV light traveling through the ber, 404 nm of UVlaser light (50mW) was employed. SEM and optical microscope images were obtained using a Nova NanoSEM 450 (FEI Ltd.) and Nikon ECLIPSE LV150 microscope (Nikon), respectively. The thickness of thin lms was determined from a surface pro ler (ET200, Kosaka Laboratory Ltd.). X-ray photoelectron spectroscopy (XPS) measurements were performed using an ESCALAB250Xi (Thermo Fisher Scienti c, USA) at a basic pressure of 10 -9 mbar. Declarations