Temperature sensitivity analysis of dual material stack gate oxide source dielectric pocket TFET

The variation of the temperature-dependent performance of an electronic device is one of the major concerns in predicting the actual electrical characteristics of the device as the bandgap of semiconducting material varies with temperature. Therefore, in this article, we investigate impact of temperature variations ranging from 300 to 450K on the DC, analog/ radio frequency, and linearity performance of dual material stack gate oxide-source dielectric pocket-tunnel-field-effect transistor (DMSGO-SDP-TFET). In this regard, a technology computer-aided design simulator is used to analyze DC, and analog/radio-frequency performance parameters, such as carrier concentration, energy band variation, band-to-band tunneling rate, IDS-VGS\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{DS}-V_\mathrm{GS}$$\end{document} characteristics, transconductance (gm\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m}$$\end{document}), cut off frequency (fT\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$f_{T}$$\end{document}), gain-bandwidth product, maximum oscillating frequency (fmax\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$f_{\max }$$\end{document}), transconductance frequency product, and transit time (τ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\tau $$\end{document}) considering the impact of temperature variations. Furthermore, linearity parameters, such as third-order transconductance (gm3\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m3}$$\end{document}), third-order voltage intercept point (VIP3), third-order input-interception point (IIP3), and intermodulation distortion (IMD3) are also analyzed with temperature variations as these performance parameters are significant for linear and analog/radio-frequency applications. Moreover, the performance of the proposed DMSGO-SDP-TFET is compared with the conventional dual-material stack gate oxide-tunnel-field-effect transistor (DMSGO-TFET). From the comparative analysis, in terms of percentage per kelvin, the DMSGO-SDP-TFET demonstrates lesser sensitivity towards temperature variation. Hence, the proposed DMSGO-SDP-TFET is a suitable candidate for low-power switching, and biosensing applications at elevated temperatures as compared to conventional DMSGO-TFETs.

In the previous work [21], to enhance the DC, analog/ radio frequency performance of the device, authors have proposed DMSGO-SDP-TFET with optimized dielectric pocket at the source-channel junction and reported an improved performance in terms of higher ON-state current ( I ON = 1.47 ×10 −4 A) at ( V GS = V DS =1.0 V), smaller point subthreshold swing (SS) = 15.7 mV/decade, maximum I ON /I OFF ratio (3.14×10 12 ), transconductance ( g m = 1.02 ×10 −3 S), and cut-off frequency ( f T = 193 GHz).
However, the operating temperature always impacts the on-chip performance of the device. With increase the number of transistors in the integrated circuits (ICs), level of heat dissipation increases, which leads to rise the operating temperature of the chip and hence of the device (transistor). Furthermore, from the perspective of transistor applications in some harsh environments (where the operating temperature differs from the room temperature) such as wireless/ mobile/satellite communications, military, medical equipment, avionics, furnace temperature control, automobiles, etc. The integrated circuit chips employed for analog/RF applications needs a more accurate prediction of electrical characteristics of the device at higher temperatures. Hence, first time we have done extensive study for temperature sensitivity analysis of DMSGO-SDP-TFET as well as conventional DMSGO-TFET, also compared the temperature sensitivity of these devices under same bias conditions in terms of DC characteristics, analog/radio frequecncy, and linearity distortion performance parameters using TCAD Simulations.
The remaining part of this paper is organized as follows. Section 2 presents the structural and simulation setup details. Section 3 describes the temperature sensitivity of DMSGO-TFET and DMSGO-SDP-TFET in three parts. The first part presents a temperature sensitivity analysis of various DC parameters, the second part investigates the analog/radio frequency performance and the third part presents the linearity and distortion performance at different temperatures. Finally, the main findings of this work are concluded in Sect. 4.  Table 1. A stack gate oxide approach (low-k/high-k stack gate oxide i.e. SiO 2 /HfO 2 stack) is used to provide better quality oxide/channel interface which enhances the ON-state current [30]. The entire length of the stack gate (L G ) is considered 50 nm with SiO 2 oxide layer thickness of (0.8 nm) and HfO 2 oxide layer thickness of (1.2 nm) [19]. Furthermore, the total gate length ( L G ) of both devices is partitioned into three parts: tunneling gate ( M 1 ), control gate ( M 2 ), and auxiliary gate ( M 3 ) with different length ( L 1 , L 2 , L 3 ) and work function ( 1 , 2 , 3 ), respectively. The control gate workfunction ( 2 ) is considered 4.4 eV which corresponds to the metal molybdenum (Mo) (4.36-4.95 eV). The work functions ( 1 and 3 ) are considered 4.0 eV which corresponds to metal aluminum (Al) (4.0-4.26 eV) [24]. The combination of stack gate oxide approach with workfunction engineering ( 1 = 3 = 4.0 eV < 2 = 4.4 eV) and dielectric pocket at the source-channel interface is used to enhance the ON-state current, reduce leakage current, improve the switching ratio, subthreshold swing and analog /radio frequency performance of the device. The temperature sensitivity of the proposed DMSGO-SDP-TFET is analyzed using TCAD simulations. For this, suitable models are incorporated such as the nonlocal bandto-band tunneling (BTBT) model is considered to measure the tunneling probability across the junctions. The Shockley-Read-Hall model is enabled to account for the minority carrier recombination effect. The bandgap narrowing model is used to consider the bandgap narrowing caused by high doping concentration. In our simulations, the Quantum confinement effect is not taken into account as it is significant only if the thickness of the Si body is less than 10 nm. In addition to these models, Newton's method was used to provide strong coupling between the resulting equations in order to improve current convergence.

Temperature sensitivity analysis of DC parameters
This section presents the comparative temperature-sensitive performance analysis of conventional DMSGO-TFET and proposed DMSGO-SDP-TFET in terms of carrier concentration, energy band variation, BTBT Variation, I DS − V GS characteristics, threshold voltage variation ( V TH ) and average subthreshold swing variation at elevated temperatures ranging from 300 to 450K. Fig. 2a, b depict the ON-state carrier concentration variation with temperature ranging from 300 to 450K for conventional DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from these figures, due to stack gate oxide with lower work functions ( 1 = 3 = 4.0 eV), at the source (drain) junctions, the electron (hole) concentration increases (decreases) in the channel, respectively, for both the devices. Moreover, as the temperature rises above room temperature, the covalent bond inside the lattice of semiconductor body material begins to break, resulting in a larger number of electron-hole pairs (EHPs) generation. The rate of EHPs generation is directly propositional to the intrinsic carrier concentration of semiconductor ( n i ) [29]. The n i is exponentially related to temperature as per the expression Here, N a represents the impurity (acceptor/donor) carrier concentration, E g represents bandgap, K represents the Boltzmann constant, and T is the temperature.
To understand the BTBT process the energy band variation of DMSGO-TFET and DMSGO-SDP-TFET are illustrated in Fig. 2c, d respectively. The energy bandgap of the semiconductor material decreases as temperature increases, influencing device characteristics accordingly. The energy bandgap variation with temperature can be obtained using the equation [30,32] Where E g (T) represents energy band gap at absolute temperature T, E g (0) is the energy bandgap at T= 0 K, and , represents material-specific fitting parameters. The ONstate energy band variation with temperature ranging from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET are illustrated in Fig. 2c, d respectively. These results demonstrate that at room temperature, a significant decrease in tunneling barrier width ( ≈ 4 nm) is observed at the source junction for DMSGO-SDP-TFET, which increases the interband tunneling rate for DMSGO-SDP-TFET as compared to conventional DMSGO-TFET. Furthermore, the impact of temperature variation is noted as very small in both devices. Fig. 2e, f illustrate the inter-band tunneling rate with temperature ranging from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET, respectively. The above figures show that, with temperature variation, the inter-band tunneling rate increases in both the devices as shown in the inset. Furthermore, results demonstrate that the inclusion of a low k dielectric pocket exhibits a higher tunneling rate due to a decrease in tunneling width at the source-channel junction for DMSGO-SDP-TFET compared to conventional DMSGO-TFET.   variations have a significant impact on the OFF-state current ( I OFF ) of the device because of its dependence on minority carrier concentration, which increases with temperature. It affects the reliability of the device for circuitlevel applications because the switching ( I ON /I OFF ) ratio is highly influenced by temperature. A higher I ON /I OFF ratio results in faster switching. These results also demonstrate that the temperature dependence of DMSGO-SDP-TFET provides 0.23%/K change in I ON . Whereas DMSGO-TFET provides 1.12%/K at V GS = 1.0 V. Hence, the I ON variation with temperature ranging from 300 to 450K is 0.89%/K lesser for the DMSGO-SDP-TFET as compared to conventional DMSGO-TFET. This indicates that DMSGO-SDP-TFET is more resistant to temperature compared to DMSGO-TFET. Furthermore, because of the dielectric pocket, DMSGO-SDP-TFET has a higher I ON than DMSGO-TFET. From the I DS − V GS characteristics shown in Fig. 3a, b various device parameters such as I ON , I ON /I OFF , SS avg and V TH are extracted, presented in Tables 2  and 3. The comparative threshold voltage ( V TH ) variation with temperature using the constant current method for conventional DMSGO-TFET and DMSGO-SDP-TFET is shown in Fig. 4a. The results reveal that V TH decreases for both devices as temperature increases. Moreover, DMSGO-SDP-TFET exhibits minimum V TH because of reduced tunneling width, and the temperature dependency of DMSGO-SDP-TFET exhibits 0.095%/K change in V TH , whereas it exhibits 0.069 %/K change for DMSGO-TFET. Hence, the V TH variation with temperature ranging from 300 to 450K is 0.026 %/K higher for DMSGO-SDP-TFET compared to DMSGO-TFET. Hence, a substantial increase in drain current is observed at lower V GS in the proposed DMSGO-SDP-TFET as shown in the transfer characteristics. Fig. 4b illustrates the effect of temperature variation on the average subthreshold swing ( SS AVG ) for conventional DMSGO-TFET and DMSGO-SDP-TFET. The SS AVG is formulated using the expression [6].
The subthreshold swing is inversely proportional to the steepness of I DS − V GS characteristics curve in the subthreshold region. Fig.4b shows that SS AVG for both devices increases as the temperature rises due to an increase in OFF-state current. Moreover, temperature dependency of DMSGO-SDP-TFET provides 0.28%/K change in SS AVG , whereas it exhibits 0.32%/K change for DMSGO-TFET. Hence, SS AVG variation with temperature ranging from 300 to 450K is 0.04%/K lower for DMSGO-SDP-TFET due to narrow tunneling barrier width at the source-channel junction.

Temperature sensitivity analysis of analog/ radio frequency performance
This section presents the temperature dependence of various analog/radio frequency performance parameters such as g m , f T , GBP, f max ,TFP, for conventional DMSGO-TFET and the proposed DMSGO-SDP-TFET. The parasitic capacitances ( C gs and C gd ) are crucial parameters to analyze the analog/radio frequency and linearity performance of the device. In this regard, Fig. 5a, b illustrate the C gs variation with V GS at the temperature range from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET, respectively. A significant decrease in C gs with increasing temperature in both the devices because the potential barrier at Source channel interface increases with temperature. Similarly, Fig. 5c, d illustrate the C gd variation for both the devices, respectively. As the thermally generated charge carriers in the channel region increase the inversion layer. The potential barrier across the drain channel interface decreases as temperature increases. Hence, C gd increases at higher gate bias in both the devices. Also, a similar trend is reported in [29] Transconductance ( g m ) is one of the most crucial parameters when evaluating a device for its analog/radio frequency and linearity performance. Therefore, higher g m results in achieving higher gain, f T and GBP in the design of analog circuits [31]. In this regard, Fig. 5e, f illustrate the g m variation with temperature for DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from the results in the subthreshold region g m of both the devices are very small and it starts increasing due to a steep rise in the ONstate current. However, it starts decreasing after a particular value of V GS because of mobility degradation [32]. The results also reveal that, with increasing temperature, a peak of g m is shifted more towards lower V GS in DMSGO-SDP-TFET which means that a lower V GS is needed to achieve better analog/radio frequency performance as compared to DMSGO-TFET. Moreover, DMSGO-SDP-TFET exhibits 0.37%/K variation in g m for temperature ranging from 300 to 450K at V GS = 0.75 V, whereas for the same biasing conditions and temperature range DMSGO-TFET exhibits 0.55 %/K variation. Hence, g m of DMSGO-SDP-TFET exhibits better immunity to temperature variations when compared to DMSGO-TFET. This indicates that the proposed device is appropriate for analog/radio frequency applications at higher temperatures.
Another critical parameter for evaluating the device's analog/radio frequency performance is the cutoff frequency ( f T ). It is defined as the frequency at which current gain becomes 0 dB [28]. It is obtained using the expression 2 (C gs +C gd ) . It can be noted that f T depends on C gs , C gd and g m of the device. Fig. 6a, b depict the variation in f T with V GS at temperatures ranging from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET. As seen from Fig. 6a, b, f T initially increases with V GS due to an increase in g m and then decreases after a certain value of V GS due to the increased parasitic capacitances and reduced g m because of mobility degradation. The results also reveal that, with increasing temperature, the peak of f T is shifted more towards lower V GS in DMSGO-SDP-TFET which means that a lower V GS is needed to achieve better high-frequency performance as compared to DMSGO-TFET. Moreover, DMSGO-SDP-TFET exhibits 0.19%/K variation in f T for temperature range from 300 to 450K at V GS =0.75 V, whereas for the same biasing conditions and temperature range DMSGO-TFET exhibits 0.39 %/K variation. Hence, the proposed DMSGO-SDP-TFET exhibits better immunity and reliability to temperature variations for high-frequency applications at higher temperatures when compared to DMSGO-TFET.
The GBP is another important parameter for evaluating the analog/radio frequency performance of the device. It is formulated as GBP = g m 20 C gd . The GBP variations for DMSGO-TFET and DMSGO-SDP-TFET with V GS at the temperature range from 300 to 450K, is shown in Fig. 7a, b respectively. The results reveal that GBP of conventional DMSGO-TFET is inferior to DMSGO-SDP-TFET for the same reasons discussed earlier for the f T . Further, it is evident from the results as the temperature increases, GBP starts decreasing in both the devices due to mobility degradation. Also, the mobility degradation observed at lower V GS in DMSGO-SDP-TFET which means that a lower V GS is needed to achieve higher GBP as compared to DMSGO-TFET. Therefore, before the mobility degradation i.e, at V GS =0.75 V and temperature range from 300 to 450K, in terms of %/K variation DMSGO-TFET exhibits 0.27 %/K variation in GBP and DMSGO-SDP-TFET exhibits 0.09%/K. Hence, the proposed DMSGO-SDP-TFET shows better immunity to temperature variations compared to DMSGO-TFET.
Another crucial parameter for the analog/radio frequency performance evaluation of the device is the maximum oscillating frequency ( f max ). It is obtained as Fig. 7c, d illustrate the f max variation with V GS at temperature ranges from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from the results, due to higher f T , f max of DMSGO-SDP-TFET is greater than that of DMSGO-TFET. Furthermore, as temperature rises, f max in both devices begins to fall due to a decrease in f T caused by mobility degradation. Further, mobility degradation started at lower V GS in DMSGO-SDP-TFET which means that a lower V GS is needed to achieve higher f max as compared to DMSGO-TFET. Therefore, before the mobility degradation i.e, at V GS =0.75 V, and temperature range from 300 to 450K, in terms of %/K variation for f max , DMSGO-TFET exhibits 0.104 %/K variation and DMSGO-SDP-TFET exhibits 0.075%/K. Hence, the proposed DMSGO-SDP-TFET shows better immunity to temperature variations and exhibits better analog/radio frequency performance at lower V GS and elevated temperatures compared to DMSGO-TFET.
TFP is also an important parameter to consider for the high-frequency performance assessment of the device. It is formulated as TFP = g m I DS f T . Fig. 8a, b depict the TFP variation with temperature for DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from the results, for both devices, TFP increases linearly up to a certain value of V GS due to increased g m . After reaching its peak value, it begins to fall due to a decrease in g m and increased parasitic capacitance. The results also reveal that, as the temperature rises, the TFP of both devices falls due to a decrease in f T and g m because of mobility degradation. Moreover, the results also reveal that at V GS = 0.75 V and temperature range 300 to 450K, in terms of %/K variation, DMSGO-TFET exhibits 0.32 %/K variation in TFP and the proposed DMSGO-SDP-TFET exhibits 0.13%/K. Hence, the proposed DMSGO-SDP-TFET shows better immunity to temperature variations compared to conventional DMSGO-TFET. The transit time ( ) is another important parameter for the radio frequency performance assessment of the device. It is defined as the time taken by the device to transfer the carriers from source to drain region [24]. It is formulated as = 1 2 10f T . From the above expression, it is evident that transit time depends on f T . Fig. 8c, d depict the transit time varies with temperature for DMSGO-TFET and DMSGO-SDP-TFET, respectively. From Fig. 8c, it can be seen that with increasing V GS , decreases in both devices, whereas in the case of DMSGO-SDP-TFET shown in Fig. 8d after a certain V GS transit time starts increasing due to decrease in f T because of mobility degradation. Moreover, the results also reveal that the effect of temperature variations on conventional DMSGO-TFET is negligible, whereas DMSGO-SDP-TFET exhibit significant variation in transit time. Finally, the temperature sensitivity of different device parameters in % per kelvin for conventional DMSGO-TFET and the proposed DMSGO-SDP-TFET are presented in Table 2, and the performance of the proposed device is compared to recent literature in Table 3.

Temperature sensitivity analysis of linearity and distortion figure of merits
In this section, the impact of temperature variations on the linearity and distortion performance parameters for conventional DMSGO-TFET and the proposed DMSGO-SDP-TFET have been analyzed. In this regard, various linearity and distortion parameters such as g m3 , VIP3, IIP3, and IMD3 are considered for analysis. These parameters are defined as follows [31].
Where R S is assumed to be 50 Ω for most RF applications.
To obtain better linearity and minimum distortion VIP3, IIP3 parameters of the device should be higher, and IMD3 parameter must be lower [26,31]. Fig. 9a, b illustrate the impact of temperature variations ranging from 300 to 450K on higher-order transconductance ( g m3 ) for DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from the above figures that g m3 variation is negligible at lower V GS for both devices. Moreover, the results also reveal that DMSGO-SDP-TFET is more sensitive to temperature variations at higher gate voltage compared to DMSGO-TFET. A device with a higher value of VIP3 shows better linearity [25,31]. Here, Fig. 9c, d illustrate VIP3 variation with V GS at a different temperature ranging from 300 to 450K for DMSGO-TFET and DMSGO-SDP-TFET, respectively. It is evident from the results VIP3 of the proposed DMSGO-SDP-TFET is higher and shows better linearity compared to DMSGO-TFET. Further, the results also reveal that both the devices are temperature sensitive for higher V GS .   The impact of temperature variations on the IIP3 for DMSGO-TFET and DMSGO-SDP-TFET are illustrated in Fig. 10a, b respectively. It is evident from the results that IIP3 of the proposed DMSGO-SDP-TFET is higher than DMSGO-TFET, this increase in the IIP3 parameter indicates improvement in the linearity performance of the device. Therefore, DMSGO-SDP-TFET shows better linearity compared to DMSGO-TFET. Further, the results also reveal that as the temperature increases from 300 to 450K, both the devices are temperature sensitive at lower and higher V GS .
A lower IMD3 parameter indicates that the device can withstand higher distortions [31]. In this regard, Fig. 10c, d illustrate the IMD3 variation with temperature. Results demonstrate that DMSGO-SDP-TFET exhibits 0.10%/K variation in IMD3 with temperature ranging from 300 to 450K at V GS = 1.2 V and V DS = 1.0 V, whereas, for the same operating temperature and biasing conditions, DMSGO-TFET exhibits 0.41 %/K variation. Hence, DMSGO-SDP-TFET shows better intermodulation distortion performance and more reliable to temperature variations as compared to conventional DMSGO-TFET.

Conclusions
A comparative temperature sensitivity analysis of DC, analog/radio frequency, linearity, and distortion performance has been carried out for conventional DMSGO-TFET and the proposed DMGOSDG-TFET at the temperature ranging from 300 to 450K. Based on this study, it can be stated that for the same biasing conditions and temperature range, the DC, analog/radio frequency, and linearity performance parameters of the proposed DMSGO-SDP-TFET are less sensitive to the temperature variation compared to conventional DMSGO-TFET. Further, the results summarized in Table 2 in % variation per kelvin, and Table 3 performance comparison with recent literature indicate that DMSGO-SDP-TFET is more reliable when compared to DMSGO-TFET. Hence, it can be concluded that the proposed DMSGO-SDP-TFET is a better choice for low power switching and analog/radio frequency applications for elevated temperature range .