Ultrahigh-temperature film capacitors via homo/heterogeneous interfaces


 High-performance dielectric capacitors are in high demand for advanced electronics and electric power systems. They possess high power density (on the order of Megawatt) and exhibit ultrafast charge/discharge capability (on a microsecond scale) and long-term storage lifetime1-5, and thus they are particularly demanded in pulse power systems such as high-power microwaves, hybrid electric vehicles, and high-frequency inverters. However, their relatively low operating temperature limits their widespread applications6-9. Here, guided by phase-field simulations, we synthesized capacitors with an energy storage density of 55.4 joules per cubic centimeter, energy efficiency of over 82%, and superior thermal stability and fatigue properties at record high operating temperature of 400°C. These ultrahigh-temperature performances are achieved through a relatively simple method of introduction and engineering of interfaces within the capacitors, which greatly improve their high-temperature stability, relaxation behavior, and breakdown strength. Our work not only successfully fabricated capacitors with potential applications in high-temperature electric power systems and electronic technologies but also opens up a promising and general route for designing high-performance electrostatic capacitors through interface engineering.


Abstract
High-performance dielectric capacitors are in high demand for advanced electronics and electric power systems. They possess high power density (on the order of Megawatt) and exhibit ultrafast charge/discharge capability (on a microsecond scale) and long-term storage lifetime [1][2][3][4][5] , and thus they are particularly demanded in pulse power systems such as high-power microwaves, hybrid electric vehicles, and highfrequency inverters. However, their relatively low operating temperature limits their widespread applications [6][7][8][9] . Here, guided by phase-field simulations, we synthes ized capacitors with an energy storage density of 55.4 joules per cubic centimeter, energy efficiency of over 82%, and superior thermal stability and fatigue properties at record high operating temperature of 400°C . These ultrahigh-temperature performances are achieved through a relatively simple method of introduction and engineering of interfaces within the capacitors, which greatly improve their high-temperature stability, relaxation behavior, and breakdown strength. Our work not only successfully fabricated capacitors with potential applications in high-temperature electric power systems and electronic technologies but also opens up a promising and general route for designing high-performance electrostatic capacitors through interface engineering.

Main text
Dielectric capacitors belong to one important family of energy storage elements used in every electronic equipment. However, their relatively low operating temperature greatly limits their applications in harsh environment, for example underground oil and gas exploration (beyond 200°C) 6 . Even though a cooling system can be integrated in some applications, for example, in hybrid electric vehicles to reduce the working temperature to below 105°C for the capacitors made of the commercia lly biaxially oriented polypropylene (BOPP) [6][7][8][9] , the auxiliary cooling loop undoubtedly adds extra weight, volume, as well as energy consumption. Therefore, increasing the operating temperature of dielectric capacitors while maintaining high energy storage density is extremely critical to realizing their new technological applications.
To possess high energy storage density (Ue) and high efficiency (ƞ) 10 and to be able to operate at high temperatures, a dielectric capacitor must satisfy the following requirements: (i) stable high permittivity with low loss in the applied temperature range 6,11 ; (ii) low electric conductivity at elevated temperature to minimize the leakage current of the dielectric and ensure a high breakdown strength 5,9,12 ; (iii) high thermal conductivity to allow efficient heat dissipation 5,13,14 . There have been extensive efforts to develop dielectric thin films to meet these requirements [15][16][17][18][19][20] . For example, lead-based dielectrics are first considered due to their high Curie temperature, and thus high and stable permittivity over a wide temperature range, and an upper operation temperature of up to 280°C with energy density ~26 J/cm 3 were achieved 21 . Due to the environmental concerns associated with lead-based dielectrics, a number of approaches have been attempted to develop lead-free dielectric materials for potential applicatio ns in high-temperature dielectric capacitors, including ion substitutions 15,22,23 , composited dielectrics 3,16,24 , and the artificially configured structures combining relaxor ferroelectric, antiferroelectric, ferroelectric and linear dielectric 25-28 . The highest operation temperature in lead-free materials with an energy storage density of ~30 J/cm 3 is 250°C 20 , which is still far below many application requirements. Therefore, the main objective of this work is to explore a novel interfacial engineering approach to boost the upper limit of working temperature and energy storage density of lead-free dielectr ic materials to realize high-temperature applications of dielectric capacitors.
We first conducted phase-field simulations (see Methods for Phase-field Simulations) to investigate the dielectric breakdown path, local polarization distribut io n, and heat flux of dielectrics with artificially configured interfaces. In particular, we consider four representative dielectric structures (Fig. 1a): pure matrix (PM), vertical interfaces (VI), parallel interfaces (PI), and regular interlayer interfaces (II). Our hypothesis is that the interfaces in the dielectric may alter the dielectric breakdown path and thus enhance the dielectric breakdown strength. Indeed, more tortuous and shorter broken paths (black region) occur in the dielectrics with parallel interfaces and regular interlayer interfaces (Fig. 1b). The interfaces in PI, VI and II break the long-range ordered domains into random nanodomains (Fig. 1c), which is beneficial to domain switching and reducing the remnant polarization, and hence increasing the charge-discharge efficiency. We also studied the thermal stability by modeling the heat dissipation (heat flux in Fig. 1d) for a dielectric operating at 14 MV/m with a surrounding temperature of 293 K. It is found that introducing the homo/heterogeneous interfaces into dielectrics could lower the maximal temperature from 318K in PM to 295K in II since the interfaces reduce the Joule heating and act as the exit for thermal runway. Therefore, the interfaces could synergistically enhance the energy storage performance and high-temperature stability.
Guided by the simulation results on the benefits of introducing interfaces into dielectrics in reducing thermal effect, improving the voltage endurance, and modulating the domain morphology, we attempt to synthesize a composition-gradient multila yer structure, namely heterogeneous interface (HEI) to mimic a regular interlayer interface in a dielectric, and PI or VI interface (referring to as homogeneous interface (HOI)) in a single-phase dielectric by tuning the growth conditions. The integrated homogeneous/heterogeneous interfaces will take advantage of each other's merit to achieve high-performance energy storage at high-temperatures. BaHfxTi1-xO3 (BHTO), as one of the members of BaTiO3 based dielectrics, exhibits stable permittivity and low dielectric loss in a wide temperature range. Thus, it is selected to construct a series of interface configuration including VI, PI and II demonstrated in Fig. 2a.
The BHTO films were fabricated on (001) Nb-doped SrTiO3 (Nb:STO) substrates by the radio frequency magnetron sputtering system. The epitaxial growth of the films was verified by X-ray diffraction ( Supplementary Fig. 1). The columnar structure with VI and PI is achieved in the 17 at.% Hf-doped BaTiO3 (BHTO-17) films by controlling film-growth conditions, especially the growth temperature. The density of VI and PI increases as the growth temperature decreases from 850°C (Fig. 2b) to 700°C (Fig. 2c). A lower growth temperature reduces grain growth leading to nanograin structures.
As demonstrated in reciprocal space mappings (RSMs) (Supplementary Fig. 2) and a high-angle annular dark field (HAADF) scanning transmission electron microscopy (STEM) image of BHTO-17 films prepared at 700°C (Fig. 2d), the formation of VI and PI results from grain boundary migration and coalescence as demonstrated in Fig. 2d.
Uniform elemental distribution in the BHTO films from energy-dispersive X-ray spectroscopy (EDS) mapping ( Supplementary Fig. 3) indicates negligible elementa l segregation. In order to build the structure as depicted in Fig. 2a, we selected 25 and 32 at.% Hf-doping in the BaTiO3 films with the composition, lattice parameter, and permittivity close to BHTO-17 to construct a tri-layer film denoted as HOI@HEI (Fig.   2e). The contrast variation is clearly visible under the HAADF-STEM imaging conditions 29 , indicating the appearance of the HEI in the film. Note that the VI and PI still exist in each BHTO layer. Of course, the density of the II within the film system can be manipulated by controlling the number of HOI@HEI film-growth cycles (N).
For example, compared with the film fabricated with one growth cycle (Fig. 2e), the density of the interface increases by a factor of 6 ( Fig. 2f) in the film fabricated with six growth cycles (6N). Thus, the patterned structure including VI, PI, and II is integrated into the BHTO films successfully without changing the overall thickness of the film system.
As expected by the phase field simulations, the built interfaces can significa ntly enhance Eb evaluated using a two-parameter Weibull distribution fitting (Fig. 3a). The Eb values are 7.4 MV/cm for HOI film and 8.8 MV/cm for the HOI@HEI film, which are 23% and 47% higher than that for the PM film (6.0 MV/cm), respectively. The combination of HOI, HEI and II (HOI@HEI@II) results in a maximum Eb = 9.6 MV/cm, which is 60% higher than that of the PM film, and >1100% higher than that of the pure BTO films (~0.79 MV/cm) 30 . It is worth mentioning that the Eb (9.6 MV/cm) obtained through the interface design is the highest breakdown field strength among all previous reports 31-35 . The Weibull modulus β that describes the scatter of breakdown field data also gradually increases from 15 (the PM film) to 33 (HOI@HEI@II film) upon introduction of interfaces into the films. The relatively large β in HOI@HEI@II film suggests a narrowed distribution of Eb values and an improvement of dielectr ic reliability. The suppressed electric breakdown stems from the greatly reduced leakage current by two orders of magnitude from 3.5 ×10 −5 to 6.7 × 10 −7 A/cm 2 at a DC field of 4 MV/cm (Fig. 3b). The combination of homogeneous and heterogeneous interfaces effectively prolongs the ohmic conduction to 2.37 MV/cm, and delays the on-set of the Fowler-Nordheim tunneling mechanism (Supplementary Fig. 4). Besides the increase in Eb, the Pm/Pr value is another key parameter for determining the energy storage performance of a dielectric. We extracted the values of Pm and Pr and plotted Pm/Pr in  Fig. 5). The films with designed interfaces clearly outperform the PM film in terms of Ue and ƞ (Fig. 3d) evaluated through their unipolar P-E loops ( Supplementary Fig. 6). Strikingly, the Ue reaches a maximum value of 131 J/cm 3 under 9.2 MV/cm for the film with HOI@HEI@II, which is 2.5 times higher than the 51 J/cm 3 measured in the PM film. The ƞ value is improved from 65 to 86% at the same Eb of 5.0 MV/cm with increasing interface density. More importantly, the HOI@HEI@II film maintains a high ƞ of ~80% even at Eb = 9.2 MV/cm approaching the breakdown electric fields. To obtain the temperature dependence of the dielectric performances of the structures, we obtained P-E loops at different temperatures ( Supplementary Fig. 7) and the temperature dependent energy density Ue and efficiency ƞ (Fig. 4a). The first observation is the broadening of operating temperature and the increase in energy density with the introduction of interfaces. The operating temperature extends from 250°C to 400°C as the film structure changes from PM to HOI@HEI@II structure, and the corresponding energy storage density can be as high as 55.4 J/cm 3 over the temperature range -100°C to 400°C. To our best knowledge, there have been no reports of operating temperatures over 300°C for dielectric materials. We found that the energy storage density is much higher than the benchmark value (26.8 J/cm 3 ) obtained at 280°C 21 . It should be pointed out that the excellent temperature stability covers most of the intended applications (i.e., South Pole -90°C to the engineering working temperature in aerospace 250°C, or geotherm 320°C). The energy density Ue of the HOI@HEI@II structure may reach 72.8 J/cm 3 under the upper temperature at 300°C ( Supplementary Fig. 8). In addition, both Ue and ƞ exhibit outstanding thermal stability over such a wide temperature range with ƞ maintaining above 82%, in contrast to PM which shows a sharp decrease at 250°C. We attribute the broad working temperature range and stable energy storage properties to a number of factors. First, the maximum permittivity temperature (Tm) shifts downwards with increasing interface density (Fig.   4b) owing to the increased relaxor diffuseness factor γ defined as the degree of diffuseness which varies between 1 (normal ferroelectrics) and 2 (ideal relaxor ferroelectrics). The γ increases from 1.36 for the PM film to 2.00 for the HOI@HEI@II film in the measurement temperature range from room temperature to 500 o C derived from modified Curie-Weiss law (Supplementary Fig. 9). The increased relaxor feature behavior of the HOI@HEI@II structure is responsible for its maximum and most stable permittivity. Second, the lowest dielectric and reduced conduction losses ( Supplementary Fig. 10) effectively decrease Joule heating and temperature rise inside the dielectric (Fig. 1d), thus retarding thermal breakdown. Finally, the introduced interfaces reduce leakage current (Fig. 3b), extend the ohmic conduction behavior ( Supplementary Fig. 4), and greatly suppress the leakage current at high temperatures ( Supplementary Fig. 11), which suppresses electron avalanche and thus Joule heating. Performance stability and reliability are another critical prerequisite for the commercialization of dielectric capacitors. The fatigue behaviors of the HOI@HEI@II film are tested under 4.7 MV/cm at 400°C (Fig. 4c).
We found the variation in Ue and ƞ less than 2% after 1×10 6 charge-discharge cycles, which is close to the commercial standard. Additionally, the films with designed interfaces can quickly discharge the stored energy in 0.45μs, and the power density is stable over the test temperature range and can be as high as 105 MW/cm 3 at 400°C ( Supplementary Fig. 12). These excellent performances are superior to previous ly reported polymer thin films 5,9,31,32 , lead-based thin films 21, 33-35 , and lead-free thin films 3, 16, 24, 28 (Fig. 4d). They meet the requirements for applications in almost all the extreme conditions. The designed homo/heterogeneous interfaces in a composition gradient system not only broadens the working temperature to 400°C but also improves the energy storage density and efficiency. The findings in this work should have broad impacts on energy storage devices for harsh environments. This interface-design strategy can be applied to other material systems, such as 0.85BaTiO3−0.15Bi (Mg0.5Zr0.5) O3, BZT, and PLZT to improve their overall energy storage performances. It should also be generally applicable to any insulating systems in which the homo/heterogeneo us interfaces can be manipulated for electric device applications at ultra-high temperatures.