ID-VG characteristics of TFTs before and after bias temperature stress
Figure 1a shows the structure of a rigid organic light-emitting diode (OLED) display panel manufactured on a glass substrate and a flexible OLED display panel manufactured on a PI substrate. For the two types of panels, a–IGZO TFT was used as the driving device, and OLED was used as the light emitting device. A device that has been processed up to TFT is called a backplane. Figures 1b, c, and d show the three different a–IGZO TFT structures used in this study. Devices A and B have the same barrier structure of SiO2 and different substrates of glass and PI, respectively. However, Devices B and C have the same substrate with PI, but the barrier structure is different with SiO2 and SiO2/SiCOH, respectively. The SiO2/SiCOH bilayer is the barrier structure proposed in this paper. Figures 1d, e, and f show the change of drain current (ID)-gate voltage (VG) of the three devices before and after negative bias temperature stress (NBTS) that applies an electric field of -1 MV/cm to the gate electrode at 70°C for 4,000 s. After NBTS, the Vth shift (ΔVth) for Devices A, B, and C is (-0.36, +0.45, and -0.25) V, respectively. Note that Devices A and C have the same negative Vth shift, while Device B has a positive Vth shift. Supplementary Table 1 summarizes the specific numbers of changes in the transfer parameters of TFTs before and after NBTS. The positive Vth shift under NBTS is an abnormal phenomenon, which is hard to understand with the generally accepted degradation models such as the reaction–diffusion model31. The general degradation models focus on the events occurring at the semiconducting channel and gate insulator layer interface. Furthermore, the interface defect densities (Nit) of these three devices, extracted through the subthreshold swing (SS) method, were very similar before and after NBTS, which indicates that the Nit between channel and gate insulator of these devices are similar before and after NBTS. Considering these experimental results of Devices A and B, it can be easily inferred that the PI substrate is involved in the abnormal degradation of Device B. A previous study found that the cause of the abnormal Vth behavior in flexible TFTs was that F− was generated from PI, and charging occurred at the interface between PI and the barrier25. Such abnormal deterioration of electronic devices may cause fatal problems in the performance of flexible electronic products. For example, as depicted in Supplementary Fig. 6, an issue of image quality occurs in which the luminance of the black pattern decreases due to this abnormal deterioration phenomenon of TFTs in flexible OLED displays using the PI substrates. Supplementary Figure 6d shows the image sticking failure caused by a positive Vth shift of transistors on the flexible OLED display panels fabricated over PI substrate and single layer (SiO2) barrier, which has the same structure as Device B.
Electrical and physical characteristics of the MIM and MIS capacitor
Two kinds of MIM capacitors were manufactured, and experiments were carried out to identify the cause of the different Vth behaviors of Device B and Device C after gate bias stress application. As shown in Figs. 2a and b, the insulators used for the MIM capacitor have the same structure and manufacturing process conditions as the TFTs used in Figs. 1b and c. Supplementary Table 2 summarizes the material and electrical characteristic parameters of the insulator used in the MIM capacitors extracted through scanning electron microscopy (SEM) and C–V measurements shown in Supplementary Fig. 1 and Supplementary Fig. 2, respectively. To analyse the effect of stress conditions on the PI substrate, three distinct voltages of (-10, -20, and -30) V were applied to the top electrode at a temperature of 70°C for 10 minutes. The I–V and C–V measurements confirmed the changes in the electrical characteristics of the MIM capacitor before and after stress. Supplementary Figure 3 is the I–V plot as a function of the voltage applied to each MIM capacitor. Figure 2c shows the normalized change of the leakage current of the MIM capacitor according to the voltage applied to the top electrode. The MIM A capacitor (Al/SiO2/PI/Al), which has the same barrier structure as Device B, exhibited higher leakage current fluctuations after NBTS than MIM B capacitor (Al/SiO2/SiCOH/PI/Al), which has the same structure as Device C. This result implies that the insulator structure in MIM B is more stable under the bias stress than that of MIM A. The phenomenon behind the leakage current can be explained as follows. The hole carriers inject into the PI and break chemical bonds in the organic chains. Then, the ions such as F− generated from the broken bonds of the chains act as charged defects and increase the leakage current through the capacitors27,32. Figure 2d shows the increase in the volume resistivity of each MIM capacitor after NBTS. Here, a decrease in the resistivity of the PI can enhance the free movement of mobile charges such as charged ions, in the PI substrate. Figures 2e and f show the change in capacitance and charge density, respectively, according to the voltage application of the two MIM capacitors after NBTS. The capacitance increase indicates that the capability of containing charged ions within the interface increases. The increasing charge density of MIM capacitors infers that the number of charges trapped within the interface between barrier and PI increases. The trapped charges within the interface induce an electric field that influences the electrical properties of the devices fabricated above. Comparing the changes in leakage current, volume resistivity, total capacitance, and charge density under the bias stress, it is confirmed that MIM B is more stable than MIM A in electrical properties. Overall, these results indicate that the devices having the same barrier structure as MIM B may be more robust to an external disturbance such as an electric field. The electric field generated by trapped charges can be extracted by converting the capacitance change of the PI film into an electric charge (Supplementary Fig. 4), which implies that the change in charge density represents the generation of substrate bias. During the NBTS evaluation, it was estimated that the positive Vth shift occurred due to electron accumulation in the semiconducting bulk layer, rather than hole trapping at the gate insulator and channel interface, as the voltage stress increased.
Furthermore, three MIS capacitors imitating the barrier and substrate structure of Devices A, B, and C were fabricated and named MIS A, MIS B, and MIS C, respectively. Each MIS capacitor has the barrier and substrate structure with Al/Al2O3/ a–IGZO/SiO2/glass for MIS A, Al/Al2O3/ a–IGZO/SiO2/PI for MIS B, and Al/Al2O3/ a–IGZO/SiO2/SiCOH/PI for MIS C, and mobile charge measurement was performed. Figures 3a, b, and c illustrate experimental configurations of the three MIS capacitors using C–V measurements. Stress voltage was applied to the Al electrode with the substrate grounded as shown in Figs. 3a, b, and c to detect the effect of mobile charge within the PI in the MIS devices. 1 MV/cm electric field was applied to the upper electrode at 200 ºC for 600 s to measure the mobile charges. Then the C–V plot was extracted by sweeping the voltage applied to the upper gate electrode. After that, the field was applied to the upper gate electrode at 200 ºC for 600 s by changing only the polarity in the measurement method mentioned above, and then the C–V plots were measured. Figure 3g represents the microscopy image of the MIS capacitor for the C-V measurement. Figures 3d, e, and f show the results of the mobile charge measurement of each MIS device. The mobile charge analysis results of the three devices confirmed that the differences between the measurement results before and after applying the gate voltage of −/+1 MV for MIS A and MIS C were very similar. However, in the case of MIS B, it is evident that the flatband voltage (VFB) difference was very large when the –1 MV and the +1 MV were applied. ΔVFB and mobile charges can be calculated by Qm = − Ctotal × ΔVFB, where Qm is the mobile charge density and Ctotal = 1/(1/Cgate insulator + 1/Cbarrier + 1/CPI). From this equation, we can confirm that as ΔVFB increases, the mobile charge increases.
Previous studies have reported that the impurity mobile ions in the gate insulator layer are mainly responsible for the degradation of transistors31. However, because the only difference between MIS A and MIS B is the substrate material, it can be inferred that the mobile charges within the PI substrate play a major role in the degradation phenomena. Figure 3h shows a schematic of the charging phenomenon of the MIS capacitor when measuring the mobile charge. When a negative field is applied to the upper electrode, negative ions lead to positive polarity on the upper side of the PI. Electrons are accumulated at the bottom of the channel layer to prevent channel formation, leading to a positive shift of the C–V curve. However, the mobile charge measurement result of MIS C matched the MIS A measurement result made on a glass substrate. These results confirm once again that the barrier structure proposed in this study can play a vital role in preventing the charging phenomenon caused by the mobile charges inside the PI substrate.
Using KPFM, we can directly observe the mobile charges and intuitively confirm the charging phenomenon of the PI interface and the effect of the SiCOH film in terms of charging compensation. KPFM can also quantify the contact potential difference (CPD) between the sample surface and the tip to confirm the presence or absence of charging for each layer of the device34–38. Supplementary Figs. 5a-c and Fig. 5d illustrate the concept of the KPFM measurement method and the detailed sample preparation procedure for KPFM measurement used in this study, respectively. The CPD between the tip and the device was measured by moving across the atomic force microscopy (AFM) tip including the MIM capacitor structure from the glass to the resin sample, as shown in Figs. 4a and b. The measurements were performed before and after applying -10 V to the top electrode for 10 min for each of the two types of MIM capacitors: MIM A and MIM B. Figures 4c, d, and e show the surface potential profiles before and after applying bias for MIM A. It can be observed that after the bias is applied, the surface potential increases from the SiO2/PI interface to the PI films. It can be reasonable to suggest that negative charges in PI film exist, based on the fact that the CPD is linearly proportional to ϕtip- ϕsample39. However, the MIM B showed little change in CPD before and after applying bias, as shown in Figs. 4f, g, and h. This conclusive evidence suggests that the SiCOH film as a barrier layer can effectively remove the PI charging phenomenon in the flexible devices using the PI substrate.
Physical analysis and PI charging compensation mechanism
The optimal SiCOH film formation conditions were found by varying the plasma power during the PECVD deposition. Figure 5a shows the Fourier transform infrared (FTIR) spectroscopy measurement results for the SiCOH single film deposited by varying the plasma power for (60 and 100) W. The peak at (1,300–1,240) cm−1 in the entire wavelength range comes from the Si–CH3 bond. From (1,240 to 950) cm−1, the peak occurs in the Si–O related stretching vibration mode. The wide absorption band between (950 and 650) cm−1 corresponds to the Si– (CH3)x (x = 1, 2, 3) bending vibration40. Figure 5b shows the FTIR spectra fitted with five peaks concentrated at (805, 960, 1,007, 1,136, and 1,250) cm−1. Silicon-related peaks were normalized, and the integrated area of each peak was divided into the total integrated area. From this result, we can confirm that when the SiCOH film is deposited by the PECVD process, the Si–O bond decreases, and the Si–CH3 bond increases as the plasma power decreases. In this study, the SiCOH film was deposited under a plasma power of 60 W. To determine the causative factors that induce the charging effect in the actual PI before/after bias temperature stress, we conducted a physical analysis. Figures 5c and d show the SIMS results before and after NBTS application of two types of capacitors, MIM A (Al/SiO2/PI/Al) and MIM B (Al/SiO2/SiCOH/PI/Al) capacitors. It can be seen that the F− from PI is relatively highly accumulated at the SiO2/PI interface of the MIM A capacitor after NBTS. These accumulated F− can act as ionized charges and affect the characteristics of TFTs and other devices fabricated on the PI substrate41,42. However, MIM B had no changes in the amount of F− accumulation at the barrier and PI interface even after NBTS. This is due to the F- binding with Si in the SiCOH film since the electron affinity of F (328 KJ/mol) is higher than that of C (122 KJ/mol). Figure 5e summarizes the step-by-step mechanism of how the SiCOH film consumes F− from PI. When NBTS is applied to the MIM capacitor, F− from PI are accumulated at the barrier and PI interface (step 1). However, the Si–CH3 bond in the SiCOH film is broken by the bias temperature stress, and F− with higher electron affinity binds to Si to form a Si-F bond, neutralizing the negative charge from F- and ultimately suppressing the surface charging phenomenon (step 2). Carbon that is not bonded can be replaced by C–C or C–H bonding, and since this is a nonpolar bond, the charging effect can be prevented43.
Stable flexible display performance verification
Figure 6a is an actual picture of the flexible display panel used in this study. The Vth shift after NBTS of the TFTs in Fig. 1 was obtained from a total of 15 samples (5 samples per device), and the Vth shift is exhibited in the box plot in Fig. 6b. As opposed to Device A and C that exhibit negative Vth shifts, Device B exhibits Vth shifts that move in the positive direction. This abnormal positive Vth shift of the TFT device may cause image sticking in the flexible panel. One of the metrics that can measure display panel quality is the display image sticking evaluation. Image sticking refers to a phenomenon in which an image remains visible even after the next frame is written, thereby hindering the visibility of the succeeding image24. Supplementary Figure 5a shows the evaluation method of display image sticking. The luminance is measured at the first 64-gray pattern, which is aged for a certain time under the pattern where the black/white pattern intersects, and the luminance is measured again at the 64-gray pattern. The level at which the luminance exceeds a certain level in the late 64-gray pattern compared to the initial 64-gray pattern is evaluated as an afterimage time value. Figure 6c shows the image sticking evaluation result of the panels manufactured on Device A, B, and C. It can be confirmed that the panel manufactured on Device C has the same level of image sticking as the panel manufactured on Device A, while the panel manufactured on Device B exhibits very severe image sticking. Figure 6d shows the results of manufacturing an actual OLED display on Devices A, B, and C, initially aging it from 64-gray patterns to a chess pattern, and then measuring the panel state with a camera in the state of the 64 gray pattern. The panel manufactured on Device B confirmed that the part that had been aged with a black pattern looked darker and was recognized as image sticking. Supplementary Figures 5c and d show that the specific behavior (positive Vth shift) in the TFT device can induce this image sticking.
These results represent that the operating current of devices manufactured on PI can flow differently than expected, which can adversely affect performance of flexible electronics. In addition, it is shown that the SiCOH film presented in this study can suppress the charging phenomenon of PI and the image sticking problem by introducing the SiCOH film as a barrier. The SiCOH layer that can prevent the PI charging effect is expected to apply to all flexible devices.