In this work, we have investigated the reliability of the extended source double gate tunnel field-effect transistor (ESDG-TFET) by considering the effect of the fixed donor (positive) and acceptor (negative) interface trap charges (ITCs) at the silicon-SiO2 interface and temperature variations ranging from 300K to 480K, on the DC, analog/radio frequency (RF), linearity and harmonic distortion performance parameters. A comparative analysis has been performed between conventional stack gate oxide double gate TFET (SGO-DG-TFET) and ESDG-TFET with similar dimensions. Different performance metrics such as transfer characteristics, parasitic capacitances, gain-bandwidth product (GBP), unity gain frequency (fT), transit time, transconductance frequency product (TFP), and linearity distortion performance parameters such as 2nd and 3rd order transconductance coefficients (gm2, gm3), 2nd and 3rd order voltage intercept points (VIP2, VIP3), 3rd order input intercept point, intermodulation distortion parameters (IIP3, IMD3), and 1dB compression point have been investigated. Moreover, 2nd and 3rd order harmonic distortions (HD2, HD3) and total harmonic distortion (THD) are investigated using technology computer-aided design (TCAD) simulations. The Tables 2, 3 and 4 show that in terms of percentage variation, ESDG-TFET exhibits less variation as compared to SGO-DG-TFET, which indicates that the ESDG-TFET is more immune to ITCs and temperature variations. Thus, ESDG-TFET can be used for low power switching and analog/RF and high temperature applications.