The most essential diagnostic test for heart disease detection is the electrocardiogram (ECG). It has a low frequency and a small amplitude, making it vulnerable to a variety of stimuli, including high/low-frequency noises. As a result, the diagnostic quality suffers. ECG signal analysis deals with the major problem of removing the noise from ECG signal. Implementation of adaptive filter removes noise from the signal in a better way. Adaptive filters in signal processing plays a major role in biomedical applications for denoising different types of noises such as Power Line Interference (PLI) noise which is generated by the power line electromagnetic field and it exhibits its peak from 50Hz to 60Hz, Baseline Wander (BW) noise which occurs due to the variation of electrode skin impedance, Motion Artifacts (MA) which is generated by the electrode motions away from the contact zone on the skins and Muscle Noise, this is due to the Electromyographic signals (EMG), originating from the skeletal muscle contractions. In order to eliminate the above-mentioned noises, the most common adaptive filters such as Least Mean Square (LMS) and Recursive Least Squares (RLS) are used. In existing method, they used Cascaded Least Mean Square adaptive filters to reduce noises at a much higher rate than the Least Mean Square Adaptive filter and to achieve the higher Signal to Noise Ratio (SNR). The Cascaded RLS filter can be used to obtain faster range of convergence than the Cascaded LMS. But the problem is that while using RLS filters the computational complexity will increase and as well as the delay will also increase. So, in order to counteract these problems, Cascaded Leaky Least Mean Square filter is designed not only to increase the rate of convergence and SNR and stability but also to reduce the computational complexity. The filter is designed with adaptive variable step size which calculates the step size according to the input signal of the filter, this is used to increase the stability of the filter. The systolic architecture and associativity of the VLLMS filter is implemented to reduce the number of adders and multipliers along the critical path of the filter. This systolic architecture increases the SNR of the filter and systolic combined with associativity reduces the delay and area of the filter. The work comprises of designing the 4 tap, 8 tap and 16 tap cascaded systolic associative variable leaky least mean square adaptive filters using Simulink and the SNR comparisons have been made between normal LMS cascaded filter and cascaded VLLMS filter. The area and delay between normal filter and systolic associative filter are compared by converting the Simulink design into Verilog and by implementing in Xilinx.