When operating at higher duty ratios, the conventional SEPIC Converter loses its ability to produce high voltage gain. The SEPIC converter's gain is increased by inserting a boost converter between the input inductor and the controlled power semiconductor device. The cascaded boost-SEPIC Converter's circuit diagram is shown in Fig. 4.
The redesigned SEPIC converter operates in conduction and non – conducting modes. The source voltage \({V}_{in}\)magnetizes the inductor \({L}_{1}\) during conduction mode, followed by the diode \({D}_{2}\) and switch \(S\). Through switch S; capacitor \({C}_{1}\) magnetizes inductor \({L}_{2}\). Capacitor \({C}_{2 }\), on the contrary, magnetizes inductor \({L}_{3}\)via the semi-controlled device \(S\). During the conduction mode, the current via inductors \({L}_{1}\), \({L}_{2}\), and \({L}_{3}\) increases linearly. In the non-conduction mode, however, inductor currents drop linearly. The \({L}_{1}\) demagnetizes as a result of the capacitor \({C}_{1}\) and the \({V}_{in}\) and \({D}_{1}\). \({L}_{1}\) and \({L}_{3}\) are also demagnetized as a result of capacitors \({C}_{2 }\)and \({C}_{3 }\), followed by \({D}_{2}\) and \({D}_{3}\), correspondingly [34]. Figure 5 shows the proposed circuit in conduction and non-conduction mode
During conduction mode, switch \(S\) is turned on. The voltage across inductor \({L}_{1}\), \({L}_{2}\), \({L}_{3}\) during on state is:
\({V}_{L1}\) =\({V}_{in}\) – 3\({V}_{d}\)
\({V}_{L2}\) =\({V}_{C1}\) – 2\({V}_{d}\) -------(1)
\({V}_{L3}\) = \({V}_{C2}\) − 2\({V}_{d}\)
The voltage across inductor \({L}_{1}\), \({L}_{2}\), \({L}_{3}\) during off state is:
\({V}_{L1}\) = \({V}_{in}\) – \({V}_{C1}\) − 2\({V}_{d}\)
\({V}_{L2}\) = \({V}_{in}\) - \({V}_{L1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\) --------(2)
\({V}_{L2}\) = \({V}_{C1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\)
\({V}_{L3}\) = \({V}_{0}\) − 2\({V}_{d}\)
As per volt second balance method for inductor\({L}_{1}\)
(\({V}_{in}\) – 3\({V}_{d}\))D + (\({V}_{in}\) – \({V}_{C1}\) − 2\({V}_{d}\))(1-D) = 0
\({V}_{C1}\) = (\(\frac{Vin}{1-D})\) -2\({V}_{d}\) (\(\frac{1+D}{1-D})\) --------(3)
As per volt second balance method for inductor\({L}_{2}\)
(\({V}_{C1}\) − 2\({V}_{d}\)) D + (\({V}_{C1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\)) (1-D) = 0
\({V}_{C2}\) = (\(\frac{{V}_{C1}}{1-D})\) -2\({V}_{d}\) (\(\frac{1}{1-D})\)- \({V}_{0}\) --------(4)
As per volt second balance method for inductor\({L}_{3}\)
(\({V}_{C2}\) − 2\({V}_{d}\))D + (\({V}_{0}\) − 2\({V}_{d}\)) (1-D) = 0
\({V}_{0}\) = (\(\frac{{DV}_{C2}}{1-D})\) -2\({V}_{d}\) (\(\frac{1}{1-D})\)
\({V}_{0}\) = \(\frac{{DV}_{C1}}{1-D}\) -2\({V}_{d}\) --------(5)
From Eq. (3)
\({V}_{0}\) = \(\frac{D}{{(1-D)}^{2}}\) \({V}_{in}\) − 2\({V}_{d}\) (\(\frac{{2D}^{2}-D+1}{{(1-D)}^{2}}\)) --------(6)
Neglecting the internal resistances of the circuit. Thus, the voltage gain of the proposed Converter is: -
When operating at higher duty ratios, the conventional SEPIC Converter loses its ability to produce high voltage gain. The SEPIC converter's gain is increased by inserting a boost converter between the input inductor and the controlled power semiconductor device. The cascaded boost-SEPIC Converter's circuit diagram is shown in Fig. 4.
The redesigned SEPIC converter operates in conduction and non – conducting modes. The source voltage \({V}_{in}\)magnetizes the inductor \({L}_{1}\) during conduction mode, followed by the diode \({D}_{2}\) and switch \(S\). Through switch S; capacitor \({C}_{1}\) magnetizes inductor \({L}_{2}\). Capacitor \({C}_{2 }\), on the contrary, magnetizes inductor \({L}_{3}\)via the semi-controlled device \(S\). During the conduction mode, the current via inductors \({L}_{1}\), \({L}_{2}\), and \({L}_{3}\) increases linearly. In the non-conduction mode, however, inductor currents drop linearly. The \({L}_{1}\) demagnetizes as a result of the capacitor \({C}_{1}\) and the \({V}_{in}\) and \({D}_{1}\). \({L}_{1}\) and \({L}_{3}\) are also demagnetized as a result of capacitors \({C}_{2 }\)and \({C}_{3 }\), followed by \({D}_{2}\) and \({D}_{3}\), correspondingly [34]. Figure 5 shows the proposed circuit in conduction and non-conduction mode
During conduction mode, switch \(S\) is turned on. The voltage across inductor \({L}_{1}\), \({L}_{2}\), \({L}_{3}\) during on state is:
\({V}_{L1}\) =\({V}_{in}\) – 3\({V}_{d}\)
\({V}_{L2}\) =\({V}_{C1}\) – 2\({V}_{d}\) -------(1)
\({V}_{L3}\) = \({V}_{C2}\) − 2\({V}_{d}\)
The voltage across inductor \({L}_{1}\), \({L}_{2}\), \({L}_{3}\) during off state is:
\({V}_{L1}\) = \({V}_{in}\) – \({V}_{C1}\) − 2\({V}_{d}\)
\({V}_{L2}\) = \({V}_{in}\) - \({V}_{L1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\) --------(2)
\({V}_{L2}\) = \({V}_{C1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\)
\({V}_{L3}\) = \({V}_{0}\) − 2\({V}_{d}\)
As per volt second balance method for inductor\({L}_{1}\)
(\({V}_{in}\) – 3\({V}_{d}\))D + (\({V}_{in}\) – \({V}_{C1}\) − 2\({V}_{d}\))(1-D) = 0
\({V}_{C1}\) = (\(\frac{Vin}{1-D})\) -2\({V}_{d}\) (\(\frac{1+D}{1-D})\) --------(3)
As per volt second balance method for inductor\({L}_{2}\)
(\({V}_{C1}\) − 2\({V}_{d}\)) D + (\({V}_{C1}\) - \({V}_{C2}\) – \({V}_{0}\) − 2\({V}_{d}\)) (1-D) = 0
\({V}_{C2}\) = (\(\frac{{V}_{C1}}{1-D})\) -2\({V}_{d}\) (\(\frac{1}{1-D})\)- \({V}_{0}\) --------(4)
As per volt second balance method for inductor\({L}_{3}\)
(\({V}_{C2}\) − 2\({V}_{d}\))D + (\({V}_{0}\) − 2\({V}_{d}\)) (1-D) = 0
\({V}_{0}\) = (\(\frac{{DV}_{C2}}{1-D})\) -2\({V}_{d}\) (\(\frac{1}{1-D})\)
\({V}_{0}\) = \(\frac{{DV}_{C1}}{1-D}\) -2\({V}_{d}\) --------(5)
From Eq. (3)
\({V}_{0}\) = \(\frac{D}{{(1-D)}^{2}}\) \({V}_{in}\) − 2\({V}_{d}\) (\(\frac{{2D}^{2}-D+1}{{(1-D)}^{2}}\)) --------(6)
Neglecting the internal resistances of the circuit. Thus, the voltage gain of the proposed Converter is: -