Figure 1(a) shows the J-V curves of Sb2Se3 solar cells on TiO2 ETL and TiO2/CdS dual ETL which CdS was annealed at different temperatures. Each curve responded to the champion efficiency result under this condition. For convenience, we marked the Sb2Se3 solar cells on TiO2 ETL as L1 and on TiO2/CdS dual ETLs which CdS was annealed from 400 ℃ to 550 ℃ as L2, L3, L4, L5, respectively. From Fig. 1(a), it can be seen that L2-L5 has improved efficiency compared to L1. Among them, L4 has the highest Jsc, Voc, and PCE. As the annealing temperature increases, the Jsc of L2-L5 shows a gradually increasing, while PCE first increases and then decreases, reaching its maximum at L4. The PCE of L1 to L5 is 2.6%, 3.14%, 3.42%, 4.72%, and 4.16%, respectively. From Fig. 1(b), it can be seen that the average efficiency of the Sb2Se3 solar cells on TiO2/CdS ETLs annealed at various temperatures are much higher than that of the Sb2Se3 solar cells on single TiO2 ETL. It can also be seen from Fig. 1(a) that the Voc and Fill factor of L2 to L5 are much higher than L1. It indicates that CdS can effectively improve the interface defects of TiO2 ETL thus enhancing the efficiency of Sb2Se3 solar cells.
In order to illustrate the absorption characteristics, we measured the UV-vis absorption spectrum of TiO2/CdS dual ETL and TiO2/CdS/Sb2Se3. The Tauc plot is shown in Fig. 2(a). From Fig. 2(a) one can see that the band gap of TiO2/CdS decreases monotonically with the increase of annealing temperature. The band gaps of the TiO2/CdS which CdS was annealed from 400°C to 550°C are 2.49 eV, 2.44 eV, 2.43 eV, and 2.37 eV, respectively. The results are very close to those reported by Guo et al [17]. From Fig. 2(b), we can see that the band gaps of Sb2Se3 deposited on TiO2/CdS which CdS was annealed at 400°C to 550°C are 1.22 eV, 1.24 eV, 1.19 eV, and 1.27 eV, respectively. The results are similar to the previous reports, indicating that the Sb2Se3 layer can effectively absorb visible light and perform optical power conversion [17]. It can also be seen that the band gap corresponding to the curve at 500°C is the smallest, which can absorb more visible light, resulting in the highest efficiency of the devices.
Figure 3 shows the Nyquist plot of L1-L5 obtained from EIS testing. The equivalent circuit model consists of a series resistor (R1), a composite resistor (R2), and a constant phase element (CPE). The curves of fitting data are all semicircles, which is the feature of Sb2Se3 planar solar energy with a p-n junction. The fitting results show that the Rs values from L1-L5 are 17.5 Ω, 23.5 Ω, 18.8 Ω, 12.5 Ω, and 20.4 Ω, respectively. L4 has the largest R2, indicating that it has the smallest recombination conduction. At the same time, L4 also has the smallest R1, indicating that it has the best photovoltaic performance.
To explore the crystallization of the CdS by spin-coating process, we deposited CdS on glass by annealing at different temperatures. The XRD results are shown in Fig. 4(a). It can be clearly seen that there are peaks from (100), (002), and (101), which verified the crystallization of CdS thin films by annealing at 400°C to 550°C. The peaks are the highest for the CdS film annealing at 450°C, which is consistent with the results in Fig. 4(b). The XRD results of Sb2Se3 thin films on TiO2 ETL and TiO2/CdS dual ETL are shown in Fig. 4(b). It can be seen that the diffraction peaks match to the pattern of the PDF card very well. All diffraction peaks are from Sb2Se3, and no peaks from impure phases were observed except for those from the FTO bottom electrode. The diffraction peak of Sb2Se3 on TiO2 exhibits a preferred orientation of (hk0), while the diffraction peak of TiO2/CdS/Sb2Se3 exhibits a preferred orientation of (hk1). Compared with (hk0), the (hk1) orientation is more favorite to electron transport, thus achieving higher efficiency. According to the standard pattern of PDF#15–0861, the Sb2Se3 film is indexed as an orthogonal structure belonging to the Pnma space group. Meanwhile, due to TiO2 being too thin, peaks from TiO2 cannot be observed. The results indicate that CdS with nanostructures can effectively provide conditions for the growth and crystallization of Sb2Se3.
Figure 5 shows the SEM photos of the surface of TiO2/CdS double ETL which CdS was annealed from 400°C to 550°C. It can be seen that with the increase of annealing temperature, the crystalline size increases first and then decreases. When the annealing temperature rises to 500°C, the nanoparticles grow into the largest sheet of about 100 nm − 250 nm. With the annealing temperature further increased to 550°C, the CdS grains became smaller again, so a relatively large gap appeared. From Fig. 5 (a) to (d), we can see that CdS nanostructure is porous, so it can be more fully contacted with Sb2Se3, which can enhance the extraction of electrons.
Figure 6 shows SEM photos of Sb2Se3 on TiO2 and TiO2/CdS dual ETLs. For convenience, we marked Sb2Se3 thin films on TiO2 and TiO2/CdS which CdS was annealed from 400°C to 550°C as SF1, SF2, SF3, SF4, and SF5, respectively. SF1 is composed of grains ranging from 200 nm to 500 nm. SF2 is composed of relatively uniform grains ranging from 200 nm to 800 nm. SF3 is composed of relatively uniform grains ranging from 200 nm to 500 nm. SF4 is composed of large crystalline of 500 nm to 2.2 µm. SF5 is composed of uniform grains ranging from 150 nm to 300 nm. It can be seen that the grain size uniformity of Sb2Se3 thin film on CdS is significantly better than that on TiO2, indicating that CdS can more fully contact Sb2Se3. SF4 has a distinct rod-shaped structure compared to SF2, SF3, and SF5, which favorites the transport of electron alone the rod thus improving the performance of solar cells.
In order to obtain the cross-sectional morphology and thickness of TiO2, CdS, and Sb2Se3, we conducted cross-sectional SEM measurements to Sb2Se3 deposited on TiO2/CdS ETL (where CdS was annealed at 500 ℃, and the results are shown in Fig. 6(f). It can be seen that Sb2Se3 exhibits dense grains and uniform thickness. The Sb2Se3 grains arranged in the vertical direction, which is consistent with the surface morphology in Fig. 6 (d). The thickness of the TiO2 layer, CdS layer, and Sb2Se3 layer is approximately 50 nm, 120 nm, and 450 nm, respectively.
The high-resolution XPS spectra corresponding to the peaks of S 2p and Cd 3d are shown in Fig. 7 and Fig. 8. As can be seen from Fig. 7(a), the two peaks at 161.71 eV and 162.99 eV correspond to S 2p 3/2 and S 2p 1/2 respectively [31]. It can be seen that with the increase of annealing temperature, the S 2p characteristic peak first moves to the direction of low binding energy, and then moves to the direction of high binding energy. The two peaks at 405.39 EV and 412.09 EV in Fig. 8 (a) belong to Cd 3d 5/2 and Cd 3d 3/2, respectively [32]. This is consistent with the change trend of S 2p characteristic peak shown in Fig. 7. It can be seen that the Binding energy is the lowest at 500 ℃, which indicates that the temperature has the best performance. At 550 ℃, the binding energy may be increased due to the high temperature and enhanced oxidation.
Electron mobility(µ) and Density of states of defects (ntrap) of Sb2Se3 solar cells on TiO2 and TiO2/CdS dual ETL can be obtained through space charge limited current (SCLC) testing [33, 34]. The logarithmic J-V curve of SCLC testing can usually be divided into three regions: the Ohmic region at low voltage, and all J-V curves follow a linear relationship with a slope very close to 1. The intermediate voltage is the trap filling limit (trap-filling limit, TFL) area and the Mott-Gurney quadratic power function area under high voltage [35].In the TFL region, defects within the device are filled with carriers until the bias voltage increases to the defect filling limiting voltage (VTFL). The ntrap can be calculated using formula (1):
VTFL=qntrapL2/2εε0 (1)
Among ε0 is the vacuum dielectric constant (8.85×10− 14 Fcm− 1), L is the thickness of Sb2Se3 film, ε = 15.1 is the relative dielectric constant of Sb2Se3[36]. The J-V curves of Sb2Se3 single electron devices on TiO2 and TiO2/CdS dual ETLs tested under dark conditions are shown in Fig. 9. The device structure shown in Fig. 9 is FTO/TiO2/CdS/Sb2Se3/PCBM/Ag, and the curve shows a clear VTFL inflection point. The VTFL can be obtained through the dark state J-V curve, and then the defect density ntrap of the corresponding single electron devices of TiO2/Sb2Se3 and CdS annealed at 400 ℃, 450 ℃, 500 ℃, and 550 ℃ can be calculated using formula (1), which is 4.23×1015 cm− 3, 1.29×1015 cm− 3, 8.41×1014 cm− 3, 6.59×1014 cm− 3 and 1.15×1015cm−3. Annealing at 500 ℃ results in the lowest density of defect states, indicating that there are the fewest defects at 500 ℃. This is consistent with the results of the J-V curve.